Revert using SRAM for the cart

budude2 · Aug 20, 2024 · eeb9e21 · eeb9e21
1 parent 0be702f
commit eeb9e21
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Showing 2 changed files with 37 additions and 64 deletions.
diff --git a/src/core/core_top.sv b/src/core/core_top.sv
@@ -274,6 +274,13 @@ assign cram1_we_n  = 1;
 assign cram1_ub_n  = 1;
 assign cram1_lb_n  = 1;
 
+assign sram_a      = 'h0;
+assign sram_dq     = {16{1'bZ}};
+assign sram_oe_n   = 1;
+assign sram_we_n   = 1;
+assign sram_ub_n   = 1;
+assign sram_lb_n   = 1;
+
 assign dbg_tx      = 1'bZ;
 assign user1       = 1'bZ;
 assign aux_scl     = 1'bZ;
@@ -287,7 +294,7 @@ wire    [31:0]  cmd_bridge_rd_data;
 
 // bridge host commands
 // synchronous to clk_74a
-wire            status_boot_done  = pll_core_locked_s & sram_wipe_done_s; 
+wire            status_boot_done  = pll_core_locked_s; 
 wire            status_setup_done = pll_core_locked_s; // rising edge triggers a target command
 wire            status_running    = reset_n; // we are running as soon as reset_n goes high
 
@@ -519,8 +526,6 @@ synch_3 #(.WIDTH(32)) s06 (cont3_key,       cont3_key_s,        clk_sys);
 synch_3 #(.WIDTH(32)) s07 (cont4_key,       cont4_key_s,        clk_sys);
 synch_3 #(.WIDTH(32)) s08 (boot_settings,   boot_settings_s,    clk_sys);
 synch_3 #(.WIDTH(32)) s09 (run_settings,    run_settings_s,     clk_sys);
-synch_3               s10 (sram_wipe_done,  sram_wipe_done_s,   clk_74a);
-
 
 logic sgb_en, rumble_en, originalcolors, ff_snd_en, ff_en, sgb_border_en, gba_en;
 logic [1:0] tint;
@@ -689,13 +694,6 @@ always_ff @(posedge clk_74a) begin
   else if (dataslot_allcomplete)  ioctl_download <= 0;
 end
 
-reg ioctl_upload = 0;
-
-always_ff @(posedge clk_74a) begin
-  if      (dataslot_requestread) ioctl_upload <= 1;
-  else if (dataslot_allcomplete) ioctl_upload <= 0;
-end
-
 logic [14:0] cart_addr;
 logic [22:0] mbc_addr;
 logic cart_a15, cart_rd, cart_wr, cart_oe, nCS;
@@ -811,13 +809,9 @@ sync_fifo #(
   .write_en_s (                                 )
 );
 
-wire sram_wipe_done, sram_wipe_done_s;
-
 cart_top cart
 (
   .reset                      ( reset             ),
-  .sram_rst                   ( ~pll_core_locked  ),
-  .sram_wipe_done             ( sram_wipe_done    ),
 
   .clk_sys                    ( clk_sys           ),
   .ce_cpu                     ( ce_cpu            ),
@@ -854,7 +848,6 @@ cart_top cart
   .isSGB_game                 ( isSGB_game        ),
 
   .ioctl_download             ( ioctl_download    ),
-  .ioctl_upload               ( ioctl_upload      ),
   .ioctl_wr                   ( ioctl_wr          ),
   .ioctl_addr                 ( ioctl_addr        ),
   .ioctl_dout                 ( ioctl_dout        ),
@@ -890,15 +883,7 @@ cart_top cart
   .Savestate_CRAMWriteData    ( Savestate_CRAMWriteData),
   .Savestate_CRAMReadData     ( Savestate_CRAMReadData),
 
-  .rumbling                   ( rumbling          ),
-
-  // SRAM External Interface
-  .sram_addr                  ( sram_a            ), //! Address Out
-  .sram_dq                    ( sram_dq           ), //! Data In/Out
-  .sram_oe_n                  ( sram_oe_n         ), //! Output Enable
-  .sram_we_n                  ( sram_we_n         ), //! Write Enable
-  .sram_ub_n                  ( sram_ub_n         ), //! Upper Byte Mask
-  .sram_lb_n                  ( sram_lb_n         )  //! Lower Byte Mask
+  .rumbling                   ( rumbling          )
 );
 
 reg [127:0] palette = 128'h828214517356305A5F1A3B4900000000;

diff --git a/src/gb/cart.v b/src/gb/cart.v
@@ -1,6 +1,5 @@
 module cart_top (
 	input         reset,
-	input         sram_rst,
 
 	input         clk_sys,
 	input         ce_cpu,
@@ -72,16 +71,7 @@ module cart_top (
 	input         Savestate_CRAMRWrEn,
 	input   [7:0] Savestate_CRAMWriteData,
 	output  [7:0] Savestate_CRAMReadData,
-	output        rumbling,
-
-  output [16:0] sram_addr,
-  inout  [15:0] sram_dq,
-  output        sram_oe_n,
-  output        sram_we_n,
-  output        sram_ub_n,
-  output        sram_lb_n,
-
-  output        sram_wipe_done
+	output        rumbling
 );
 ///////////////////////////////////////////////////
 
@@ -432,35 +422,33 @@ assign ram_mask_file =              // 0 - no ram
 
 assign has_save = mbc_battery && (cart_ram_size > 0 || mbc2 || mbc7 || tama);
 
-wire bk_en = ioctl_download || ioctl_upload;
-wire [15:0] cram_q_o;
-
-assign cram_q_h = cram_q_o[15:8];
-assign cram_q_l = cram_q_o[7:0];
-assign bk_q     = cram_q_o;
-
-sram u_cram
-(
-  // Clock and Reset
-  .clk        		( clk_sys       		), //! Input Clock
-  .reset      		( sram_rst      		), //! Reset
-  .sram_wipe_done ( sram_wipe_done    ),
-
-  // Single Port Internal Bus Interface
-  .we         ( bk_en ? bk_wr     : cram_wr                   ), //! Write Enable
-  .ub         ( bk_en ? 1'b1      : (cram_wr & cram_addr[0])  ),
-  .lb         ( bk_en ? 1'b1      : (cram_wr & ~cram_addr[0]) ),
-  .addr       ( bk_en ? bk_addr   : cram_addr[16:1]           ), //! Address In
-  .d          ( bk_en ? bk_data   : {cram_di, cram_di}        ), //! Data In
-  .q          ( cram_q_o ), //! Data Out
-
-  // SRAM External Interface
-  .sram_addr  ( sram_addr ), //! Address Out
-  .sram_dq    ( sram_dq   ), //! Data In/Out
-  .sram_oe_n  ( sram_oe_n ), //! Output Enable
-  .sram_we_n  ( sram_we_n ), //! Write Enable
-  .sram_ub_n  ( sram_ub_n ), //! Upper Byte Mask
-  .sram_lb_n  ( sram_lb_n )  //! Lower Byte Mask
+// Up to 8kb * 16banks of Cart Ram (128kb)
+dpram #(16) cram_l (
+	.clock_a (clk_sys),
+	.address_a (cram_addr[16:1]),
+	.wren_a (cram_wr & ~cram_addr[0]),
+	.data_a (cram_di),
+	.q_a (cram_q_l),
+
+	.clock_b (clk_sys),
+	.address_b (bk_addr[15:0]),
+	.wren_b (bk_wr),
+	.data_b (bk_data[7:0]),
+	.q_b (bk_q[7:0])
+);
+
+dpram #(16) cram_h (
+	.clock_a (clk_sys),
+	.address_a (cram_addr[16:1]),
+	.wren_a (cram_wr & cram_addr[0]),
+	.data_a (cram_di),
+	.q_a (cram_q_h),
+
+	.clock_b (clk_sys),
+	.address_b (bk_addr[15:0]),
+	.wren_b (bk_wr),
+	.data_b (bk_data[15:8]),
+	.q_b (bk_q[15:8])
 );
 
 endmodule