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Work towards RISC-V cross-compilation support #84

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Work towards RISC-V cross-compilation support #84

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61 changes: 56 additions & 5 deletions CMakeLists.txt
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Original file line number Diff line number Diff line change
Expand Up @@ -36,7 +36,6 @@ include(CMakeDependentOption)
include(GNUInstallDirs)

include(CheckPythonModuleExists)
include(GenerateBuiltinsList)

check_python_module_exists(PYTHON_HAVE_MARKUPSAFE markupsafe)

Expand Down Expand Up @@ -79,14 +78,23 @@ if (CMAKE_SYSTEM_PROCESSOR MATCHES "^(ppc|powerpc)")
else()
set(is-ppc 1)
endif()
endif ()
endif ()
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This is an accidental whitespace change, isn't it? If so:

Suggested change
endif ()
endif ()


set(is-s390 $<STREQUAL:${CMAKE_SYSTEM_PROCESSOR},S390>)
string(CONCAT is-x64 $<OR:
$<STREQUAL:${CMAKE_SYSTEM_PROCESSOR},AMD64>,
$<STREQUAL:${CMAKE_SYSTEM_PROCESSOR},x86_64>
>)

set(is-riscv 0)
if (CMAKE_CXX_COMPILER MATCHES "riscv64")
set(is-riscv 1)
set(RISCV_EMULATOR $ENV{HOME}/github/libriscv/emulator/rvlinux)
set(is-x64 0)
endif()

include(GenerateBuiltinsList)

option(V8_ENABLE_CONCURRENT_MARKING "Enable concurrent marking" ON)
option(V8_ENABLE_I18N "Enable Internationalization support")

Expand Down Expand Up @@ -305,6 +313,7 @@ else()
$<${is-ppc}:v8/src/heap/base/asm/ppc/push_registers_asm.cc>
$<${is-s390}:v8/src/heap/base/asm/s390/push_registers_asm.cc>
$<${is-x64}:v8/src/heap/base/asm/x64/push_registers_asm.cc>
$<${is-riscv}:v8/src/heap/base/asm/riscv/push_registers_asm.cc>
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s/tab/whitespace/

Suggested change
$<${is-riscv}:v8/src/heap/base/asm/riscv/push_registers_asm.cc>
$<${is-riscv}:v8/src/heap/base/asm/riscv/push_registers_asm.cc>

)
endif()

Expand Down Expand Up @@ -383,6 +392,31 @@ add_library(v8_base_without_compiler STATIC
$<$<AND:${is-ppc},${is-ppc64}>:v8/src/execution/ppc/simulator-ppc.cc>
$<$<AND:${is-ppc},${is-ppc64}>:v8/src/regexp/ppc/regexp-macro-assembler-ppc.cc>
$<$<BOOL:${V8_ENABLE_I18N}>:$<TARGET_OBJECTS:v8-i18n-support>>
$<${is-riscv}:v8/src/builtins/riscv/builtins-riscv.cc>
$<${is-riscv}:v8/src/codegen/riscv/assembler-riscv.cc>
$<${is-riscv}:v8/src/codegen/riscv/base-assembler-riscv.cc>
$<${is-riscv}:v8/src/codegen/riscv/base-constants-riscv.cc>
$<${is-riscv}:v8/src/codegen/riscv/base-riscv-i.cc>
$<${is-riscv}:v8/src/codegen/riscv/cpu-riscv.cc>
$<${is-riscv}:v8/src/codegen/riscv/extension-riscv-a.cc>
$<${is-riscv}:v8/src/codegen/riscv/extension-riscv-c.cc>
$<${is-riscv}:v8/src/codegen/riscv/extension-riscv-d.cc>
$<${is-riscv}:v8/src/codegen/riscv/extension-riscv-f.cc>
$<${is-riscv}:v8/src/codegen/riscv/extension-riscv-m.cc>
$<${is-riscv}:v8/src/codegen/riscv/extension-riscv-v.cc>
$<${is-riscv}:v8/src/codegen/riscv/extension-riscv-zicsr.cc>
$<${is-riscv}:v8/src/codegen/riscv/extension-riscv-zifencei.cc>
$<${is-riscv}:v8/src/codegen/riscv/macro-assembler-riscv.cc>
$<${is-riscv}:v8/src/compiler/backend/riscv/code-generator-riscv.cc>
$<${is-riscv}:v8/src/compiler/backend/riscv/instruction-scheduler-riscv.cc>
#$<${is-riscv}:v8/src/compiler/backend/riscv/instruction-selector-riscv32.cc>
$<${is-riscv}:v8/src/compiler/backend/riscv/instruction-selector-riscv64.cc>
$<${is-riscv}:v8/src/deoptimizer/riscv/deoptimizer-riscv.cc>
$<${is-riscv}:v8/src/diagnostics/riscv/disasm-riscv.cc>
$<${is-riscv}:v8/src/diagnostics/riscv/unwinder-riscv.cc>
$<${is-riscv}:v8/src/execution/riscv/frame-constants-riscv.cc>
$<${is-riscv}:v8/src/execution/riscv/simulator-riscv.cc>
$<${is-riscv}:v8/src/regexp/riscv/regexp-macro-assembler-riscv.cc>
${api-sources}
${asmjs-sources}
${ast-sources}
Expand Down Expand Up @@ -540,6 +574,7 @@ add_library(
$<${is-mips64}:v8/src/builtins/mips64/builtins-mips64.cc>
$<${is-mips}:v8/src/builtins/mips/builtins-mips.cc>
$<${is-ppc}:v8/src/builtins/ppc/builtins-ppc.cc>
$<${is-riscv}:v8/src/builtins/riscv/builtins-riscv.cc>
$<${is-s390}:v8/src/builtins/s390/builtins-s390.cc>
$<${is-x64}:v8/src/builtins/x64/builtins-x64.cc>
$<$<BOOL:${V8_ENABLE_I18N}>:v8/src/builtins/builtins-intl-gen.cc>
Expand Down Expand Up @@ -625,16 +660,21 @@ target_link_libraries(v8_snapshot
v8-bytecodes-builtin-list
)

if (is-riscv)
set(mksnp-prefix ${RISCV_EMULATOR} -P --)
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Suggested change
set(mksnp-prefix ${RISCV_EMULATOR} -P --)
set(mksnp-prefix ${RISCV_EMULATOR} -P --)

And consider naming it mksnapshot-prefix for clarity.

endif()

# Note: allow passing in v8_random_seed
add_custom_command(
COMMAND
mksnapshot
${mksnp-prefix} mksnapshot
--embedded_src ${PROJECT_BINARY_DIR}/embedded.S
--startup_src ${PROJECT_BINARY_DIR}/snapshot.cc
$<${is-arm64}:--target_arch=arm64>
$<${is-x64}:--target_arch=x64>
$<${is-ppc}:--target_arch=ppc>
$<${is-ppc64}:--target_arch=ppc64>
$<${is-riscv}:--target_arch=riscv64>
$<$<PLATFORM_ID:Darwin>:--target_os=mac>
$<$<PLATFORM_ID:Linux>:--target_os=linux>
$<$<PLATFORM_ID:Windows>:--target_os=win>
Expand Down Expand Up @@ -855,6 +895,9 @@ target_compile_options(v8_libbase PRIVATE ${disable-exceptions})
if(enable-fPIC)
target_compile_options(v8_libbase PRIVATE ${enable-fpic})
endif()
if (is-riscv)
target_link_libraries(v8_libbase PUBLIC -L/usr/riscv64-linux-gnu/lib -latomic)
endif()
target_include_directories(v8_libbase PRIVATE ${PROJECT_SOURCE_DIR}/v8)
target_link_libraries(v8_libbase
PRIVATE
Expand Down Expand Up @@ -888,6 +931,9 @@ target_include_directories(bytecode_builtins_list_generator
)

target_link_libraries(bytecode_builtins_list_generator v8_libbase)
if (is-riscv)
target_link_libraries(bytecode_builtins_list_generator -static)
endif()

#
# v8_torque_generated
Expand Down Expand Up @@ -1005,9 +1051,13 @@ target_include_directories(v8_torque_generated
file(WRITE "${PROJECT_BINARY_DIR}/touch_torque_outputs.cmake"
"file(TOUCH ${torque-outputs};${torque_outputs})")

if(is-riscv)
set(torque-prefix ${RISCV_EMULATOR} -P --) # Proxy through RISC-V emulator
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Suggested change
set(torque-prefix ${RISCV_EMULATOR} -P --) # Proxy through RISC-V emulator
set(torque-prefix ${RISCV_EMULATOR} -P --) # Proxy through RISC-V emulator

endif()

add_custom_command(
COMMAND
torque
${torque-prefix} torque
-o ${PROJECT_BINARY_DIR}/torque-generated
-v8-root ${PROJECT_SOURCE_DIR}/v8
${torque_files}
Expand Down Expand Up @@ -1042,7 +1092,7 @@ add_executable(torque)
target_sources(torque PRIVATE ${torque-program-sources})
target_compile_options(torque PRIVATE ${enable-exceptions})
target_include_directories(torque PRIVATE ${PROJECT_SOURCE_DIR}/v8)
target_link_libraries(torque PRIVATE v8_libbase)
target_link_libraries(torque PRIVATE v8_libbase -static)

#
# mksnapshot
Expand Down Expand Up @@ -1073,6 +1123,7 @@ target_link_libraries(mksnapshot
v8_initializers
v8-bytecodes-builtin-list
v8_torque_generated
-static
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Suggested change
-static
-static

I half and half expect this to break Windows builds though.

)

add_library(v8-adler32 OBJECT v8/third_party/zlib/adler32.c)
Expand Down
6 changes: 5 additions & 1 deletion cmake/GenerateBuiltinsList.cmake
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Original file line number Diff line number Diff line change
@@ -1,3 +1,7 @@
if (is-riscv)
set(bblg-prefix ${RISCV_EMULATOR} -P --) # Proxy through the emulator
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Suggested change
set(bblg-prefix ${RISCV_EMULATOR} -P --) # Proxy through the emulator
set(bblg-prefix ${RISCV_EMULATOR} -P --) # Proxy through the emulator

And please name it less abbrev.

endif()

function(v8_generate_builtins_list target-dir)
set(directory ${target-dir}/builtins-generated)
set(output ${directory}/bytecodes-builtins-list.h)
Expand All @@ -7,7 +11,7 @@ function(v8_generate_builtins_list target-dir)
COMMENT "Generating ${directory}"
VERBATIM)
add_custom_command(
COMMAND bytecode_builtins_list_generator ${output}
COMMAND ${bblg-prefix} bytecode_builtins_list_generator ${output}
DEPENDS ${directory}
OUTPUT ${output}
COMMENT "Generating ${output}"
Expand Down
3 changes: 3 additions & 0 deletions v8/src/heap/base/asm/riscv/push_registers_asm.cc
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Expand Up @@ -10,6 +10,7 @@
//
// Calling convention source:
// https://riscv.org/wp-content/uploads/2015/01/riscv-calling.pdf Table 18.2
#include <v8config.h>
#ifdef V8_TARGET_ARCH_RISCV64
asm(".global PushAllRegistersAndIterateStack \n"
".type PushAllRegistersAndIterateStack, %function \n"
Expand Down Expand Up @@ -90,4 +91,6 @@ asm(".global PushAllRegistersAndIterateStack \n"
" lw s0, 0(sp) \n"
" addi sp, sp, 56 \n"
" jr ra \n");
#else
#error "RISC-V PushAllRegistersAndIterateStack unable to determine target arch."
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Patches to V8 should go into patches/, not be directly applied, otherwise the next update will blow them away.

But! - and this is important - changes should be submitted to upstream first, because I don't want to be forward-porting patches forever if I can avoid it. See https://v8.dev/docs/contribute for more info.

#endif