This is a fully functional 8-bit computer built on a breadboard using the WDC 65C02 microprocessor. The architecture is based on the educational project by Ben Eater, with several modifications to component placement and minor hardware differences. The system includes key components such as RAM, EEPROM, a 65C22 VIA for I/O and interrupts, and a character LCD display.
All software is written manually in 6502 assembly language. Two demonstration programs are currently implemented.
- Displays the message
"moving block:"on the first line of the LCD. - A block character (
0xFF) is displayed on the second line. - Each button press triggers an interrupt that moves the block to the left.
- Demonstrates interrupt handling, VIA configuration, and real-time display updates.
- Displays a 16-bit counter that increments continuously.
- Generates and displays random "true" or "false" values based on a pseudo-random LFSR algorithm.
- Updates every 500 ms, showcasing text formatting and control logic.
6502-breadboard-computer/
βββ README.md # Main project overview
βββ SETUP.md # Hardware setup and wiring guide !comming soon!
βββ eeprom/ # EEPROM programming instructions !comming soon!
β βββ how_to_program.md
βββ programs/
βββ moving-block/
β βββ main.s
β βββ main.bin
β βββ README.md
βββ random-answer-generator/
βββ main.s
βββ main.bin
βββ README.md
- CPU: WDC 65C02
- RAM: 62256 (32KB SRAM)
- EEPROM: 28C256
- I/O: 65C22 VIA (connected to buttons and LCD)
- Display: 16x2 Character LCD
- Clock: 1 MHz fixed-frequency clock module
- Other: Standard reset circuit and address decoding logic
The core design and learning path for this project are based on Ben Eaterβs 6502 computer series, with custom programs and minor hardware adjustments.
- How to read and interpret component datasheets (65C02, SRAM, EEPROM, VIA) and match electrical and timing requirements.
- Designing CPU, memory, and I/O connections on a breadboard, including address decoding and bus organization.
- Writing full programs in 6502 assembly: interrupts, loops, branching logic, timed routines, and LCD control.
- Implementing memory-mapped I/O and configuring the 65C22 VIA for input/output operations.
- Debugging hardware/software integration issues such as timing mismatches, unstable signals, and incorrect addressing.
This project is actively under development. More features and programs β including games β are planned for future updates.
Contributions, suggestions, and collaborations are welcome! Feel free to open an issue or pull request if you'd like to participate.
