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[H3] Crystal identity and load network disagree #6
Description
Review finding H3, recorded 2026-10-14 for bonanzaDisplay v3. Original classification: High — resolve before order.
Location: Y1, C16, C17, R32
Current status: Schematic fix committed; PCB implementation pending. Keep open until synchronized and verified.
Original observation: The design specifies Abracon ABM8-272-T3, but C9002 selects YXC X322512MSB4SI, 12 MHz, 20 pF load and 80 Ω maximum ESR. The Abracon part specifies 10 pF load and 50 Ω ESR. C16 and C17 are each 10 pF; R32 is 1 kΩ.
Why it matters: The two capacitors contribute only 5 pF in series, plus PCB/pin parasitics. With an illustrative 3 pF parasitic allowance, the total is about 8 pF, far from the selected YXC 20 pF specification. Startup, frequency accuracy and USB operation need validation. The YXC family datasheet permits multiple load variants; the C9002 catalog entry identifies the 20 pF variant.
Recommended action: Choose one exact crystal and reconcile MPN/LCSC fields and capacitors. Raspberry Pi's reference uses ABM8-272-T3 with 15 pF capacitors and 1 kΩ at 3.3 V; confirm the actual board parasitics and test startup over temperature.
Completion criteria:
- Schematic correction committed (details and commit in the resolution-progress comment).
- Synchronize Y1/C16/C17 values and manufacturing fields into the PCB and regenerated BOM.
- Verify the final crystal/load layout and reconcile schematic/PCB connectivity and DRC; retain hardware startup/USB validation in C2.
PCB implementation is tracked in #3. This issue stays open until that work and the checks above are complete.
Evidence: Abracon drawing and Raspberry Pi hardware guide
Circuit reference: Raspberry Pi hardware design with RP2350, section 4.
Activity
skot commentedon Oct 14, 2026
Schematic fix committed on
v3.1: 138d980 (138d98085072a3ec8b454743443c368a64705ac3).Corrected Y1 to the exact Abracon ABM8-272-T3 with LCSC C20625731. Changed C16/C17 from 10 pF to 15 pF C0G, 50 V, ±5%, FH 0402CG150J500NT / C1548, retaining the 0402 footprints. R32 remains 1 kΩ. Manufacturer, part-number, datasheet and capacitor rating fields were reconciled.
Saved component fields and exported netlist were checked; all connectivity stayed unchanged. Independent KiCad ERC remained at the same 19 existing findings (4 power-source errors and 15 pin-type warnings). The schematic rendering was inspected.
Remaining: PCB implementation and final assembly-data verification are tracked in #3 and this issue's checklist. Per the owner's decision, this issue remains open until the PCB is synchronized and verified.
skot commentedon Oct 14, 2026
PCB review: circuit synchronized, but one BOM-metadata inconsistency remains.
Y1 is ABM8-272-T3 / C20625731, and C16/C17 are 15 pF C0G, 50 V, ±5%, with
PARTNO=0402CG150J500NTandLCSC=C1548. R32 remains 1 kΩ. The crystal/load connections match the schematic; the local routing and pad placement were inspected.However, both PCB capacitor footprints still have an additional
MPN=GRM1555C1E100JA01Dproperty, carried over from the old Murata 10 pF part. That conflicts with their corrected FHPARTNOandLCSCfields and is visible in the exported IPC-2581 BOM. The schematic does not contain this stale MPN property. An exporter configured to useMPNcan therefore select the wrong component despite the correct displayed value.MPNfield, or set it consistently to0402CG150J500NT, on both C16 and C17.Validation: independent stock KiCad 10.0.6 DRC with an in-memory zone refill and schematic parity check reports 0 violations, 0 unconnected items, and 0 schematic/PCB parity findings under the configured project rules. An IPC-2581-to-schematic comparison independently matched all 245 schematic pin/net assignments. The affected bottom-copper/fabrication layout was visually inspected. This is a focused verification of this fix, not final manufacturing approval; fabrication-rule coverage, assembly outputs and other review findings remain tracked separately.
Keep H3 open for this cleanup. Hardware startup/USB validation remains in #17; broader BOM/exporter reconciliation remains in #13.
Reviewed the saved local
v3.1files on 2026-10-14. These PCB edits are uncommitted on top of138d98085072a3ec8b454743443c368a64705ac3; that commit does not contain the PCB synchronization. PCB SHA-256:ffdf1331584b90e1ec01c6b8aff521c98f12abcdaa9aa5ff10d1eb920cb87932. No design files were changed by this review.skot commentedon Oct 14, 2026
Corrected and saved the remaining C16/C17 PCB metadata: both
MPNfields now contain0402CG150J500NT, matchingPARTNOandLCSC=C1548(15 pF).Verified by closing/reopening the board through KiCad IPC and by an IPC-2581 export configured to use
MPN. The native file diff contains exactly the two MPN value replacements; no layout or other field changes. Independent stock KiCad DRC reports 0 violations, 0 unconnected items and 0 schematic/PCB parity findings.This clears the stale-MPN finding from the preceding PCB review. Final assembly-package/preview validation remains in #13/#17. Changes are saved locally but remain uncommitted; PCB SHA-256:
b1e66159e64fd7862c954c4e53ab8ac91de663b6462fca8159d8b885963aa6d5. Issue state left unchanged.Sync reviewed v3.1 PCB fixes and protect BOOT chip-select