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Merged in C2000 support into master for F28069M LP Support
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Trey German committed Mar 9, 2015
2 parents e08a588 + 9344a99 commit 15ddc63
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Showing 138 changed files with 42,799 additions and 20 deletions.
29 changes: 9 additions & 20 deletions app/src/processing/app/debug/Compiler.java
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Expand Up @@ -409,29 +409,18 @@ else if( boardPreferences.get("build.mcu").equals("TMS320F28069"))
}
else if( boardPreferences.get("build.mcu").equals("TMS320F28069"))
{
if(Base.isLinux())
{
baseCommandLinker.add(corePath + "/F2806x_common/cmd/F28069.cmd");
baseCommandLinker.add(corePath + "/F2806x_headers/cmd/F2806x_Headers_nonBIOS.cmd");
}
else
{
baseCommandLinker.add(corePath + "\\F2806x_common\\cmd\\F28069.cmd");
baseCommandLinker.add(corePath + "\\F2806x_headers\\cmd\\F2806x_Headers_nonBIOS.cmd");
}


baseCommandLinker.add(corePath + "//F2806x_common//cmd//F28069.cmd");
baseCommandLinker.add(corePath + "//F2806x_headers//cmd//F2806x_Headers_nonBIOS.cmd");

}
else
{
if(Base.isLinux())
{
baseCommandLinker.add(corePath + "/f2802x_common/cmd/F28027.cmd");
baseCommandLinker.add(corePath + "/f2802x_headers/cmd/F2802x_Headers_nonBIOS.cmd");
}
else
{
baseCommandLinker.add(corePath + "\\f2802x_common\\cmd\\F28027.cmd");
baseCommandLinker.add(corePath + "\\f2802x_headers\\cmd\\F2802x_Headers_nonBIOS.cmd");
}

baseCommandLinker.add(corePath + "//f2802x_common//cmd//F28027.cmd");
baseCommandLinker.add(corePath + "//f2802x_headers//cmd//F2802x_Headers_nonBIOS.cmd");

}
}else {
baseCommandLinker.add("-L" + buildPath);
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13 changes: 13 additions & 0 deletions hardware/c2000/F28069_flash_kernel/.ccsproject
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<?xml version="1.0" encoding="UTF-8" ?>
<?ccsproject version="1.0"?>
<projectOptions>
<deviceVariant value="TMS320C28XX.TMS320F28027"/>
<deviceFamily value="C2000"/>
<codegenToolVersion value="6.3.0.A13150"/>
<isElfFormat value="false"/>
<connection value="common/targetdb/connections/TIXDS100usb_Connection.xml"/>
<linkerCommandFile value="28027_RAM_lnk.cmd"/>
<rts value="libc.a"/>
<templateProperties value="id=com.ti.common.project.core.emptyProjectWithMainTemplate,"/>
<isTargetManual value="true"/>
</projectOptions>
176 changes: 176 additions & 0 deletions hardware/c2000/F28069_flash_kernel/.cproject

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33 changes: 33 additions & 0 deletions hardware/c2000/F28069_flash_kernel/.project
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<?xml version="1.0" encoding="UTF-8"?>
<projectDescription>
<name>2806_flash_kernel</name>
<comment></comment>
<projects>
</projects>
<buildSpec>
<buildCommand>
<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
<arguments>
</arguments>
</buildCommand>
<buildCommand>
<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
<triggers>full,incremental,</triggers>
<arguments>
</arguments>
</buildCommand>
</buildSpec>
<natures>
<nature>com.ti.ccstudio.core.ccsNature</nature>
<nature>org.eclipse.cdt.core.cnature</nature>
<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
<nature>org.eclipse.cdt.core.ccnature</nature>
<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
</natures>
<variableList>
<variable>
<name>INSTALLROOT_F2806x_V136</name>
<value>$%7BPARENT-1-CCS_INSTALL_ROOT%7D/controlSUITE/device_support/f2806x/v136</value>
</variable>
</variableList>
</projectDescription>
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@@ -0,0 +1,3 @@
eclipse.preferences.version=1
inEditor=false
onBuild=false
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@@ -0,0 +1,2 @@
eclipse.preferences.version=1
org.eclipse.cdt.debug.core.toggleBreakpointModel=com.ti.ccstudio.debug.CCSBreakpointMarker
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@@ -0,0 +1,6 @@
eclipse.preferences.version=1
encoding//Debug/makefile=UTF-8
encoding//Debug/objects.mk=UTF-8
encoding//Debug/sources.mk=UTF-8
encoding//Debug/subdir_rules.mk=UTF-8
encoding//Debug/subdir_vars.mk=UTF-8
163 changes: 163 additions & 0 deletions hardware/c2000/F28069_flash_kernel/28069_RAM_lnk.cmd
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/*
//###########################################################################
//
// FILE: 28069_RAM_lnk.cmd
//
// TITLE: Linker Command File For F28069 examples that run out of RAM
//
// This ONLY includes all SARAM blocks on the F28069 device.
// This does not include flash or OTP.
//
// Keep in mind that L0,L1,L2,L3 and L4 are protected by the code
// security module.
//
// What this means is in most cases you will want to move to
// another memory map file which has more memory defined.
//
//###########################################################################
// $TI Release: F2806x C/C++ Header Files and Peripheral Examples V136 $
// $Release Date: Apr 15, 2013 $
//###########################################################################
*/

/* ======================================================
// For Code Composer Studio V2.2 and later
// ---------------------------------------
// In addition to this memory linker command file,
// add the header linker command file directly to the project.
// The header linker command file is required to link the
// peripheral structures to the proper locations within
// the memory map.
//
// The header linker files are found in <base>\F2806x_headers\cmd
//
// For BIOS applications add: F2806x_Headers_BIOS.cmd
// For nonBIOS applications add: F2806x_Headers_nonBIOS.cmd
========================================================= */

/* ======================================================
// For Code Composer Studio prior to V2.2
// --------------------------------------
// 1) Use one of the following -l statements to include the
// header linker command file in the project. The header linker
// file is required to link the peripheral structures to the proper
// locations within the memory map */

/* Uncomment this line to include file only for non-BIOS applications */
/* -l F2806x_Headers_nonBIOS.cmd */

/* Uncomment this line to include file only for BIOS applications */
/* -l F2806x_Headers_BIOS.cmd */

/* 2) In your project add the path to <base>\F2806x_headers\cmd to the
library search path under project->build options, linker tab,
library search path (-i).
/*========================================================= */

/* Define the memory block start/length for the F2806x
PAGE 0 will be used to organize program sections
PAGE 1 will be used to organize data sections

Notes:
Memory blocks on F28069 are uniform (ie same
physical memory) in both PAGE 0 and PAGE 1.
That is the same memory region should not be
defined for both PAGE 0 and PAGE 1.
Doing so will result in corruption of program
and/or data.

Contiguous SARAM memory blocks can be combined
if required to create a larger memory block.
*/

MEMORY
{
PAGE 0 :
/* BEGIN is used for the "boot to SARAM" bootloader mode */

BEGIN : origin = 0x000000, length = 0x000002
RAMM0 : origin = 0x000050, length = 0x0003B0
RAML0_L5 : origin = 0x008000, length = 0x006000 /* RAML0-5 combined */
RESET : origin = 0x3FFFC0, length = 0x000002
FPUTABLES : origin = 0x3FD860, length = 0x0006A0 /* FPU Tables in Boot ROM */
IQTABLES : origin = 0x3FDF00, length = 0x000B50 /* IQ Math Tables in Boot ROM */
IQTABLES2 : origin = 0x3FEA50, length = 0x00008C /* IQ Math Tables in Boot ROM */
IQTABLES3 : origin = 0x3FEADC, length = 0x0000AA /* IQ Math Tables in Boot ROM */

BOOTROM : origin = 0x3FF3B0, length = 0x000C10


PAGE 1 :

BOOT_RSVD : origin = 0x000002, length = 0x00004E /* Part of M0, BOOT rom will use this for stack */
RAMM1 : origin = 0x000400, length = 0x000400 /* on-chip RAM block M1 */
RAML6 : origin = 0x00E000, length = 0x002000 /* on-chip RAM block L6 */
RAML7 : origin = 0x010000, length = 0x002000 /* on-chip RAM block L7 */
RAML8 : origin = 0x012000, length = 0x002000 /* on-chip RAM block L8 */
USB_RAM : origin = 0x040000, length = 0x000800 /* USB RAM */
}


SECTIONS
{
/* Setup for "boot to SARAM" mode:
The codestart section (found in DSP28_CodeStartBranch.asm)
re-directs execution to the start of user code. */
codestart : > BEGIN, PAGE = 0
ramfuncs : > RAMM0, PAGE = 0
.text : > RAML0_L5, PAGE = 0
.cinit : > RAMM0, PAGE = 0
.pinit : > RAMM0, PAGE = 0
.switch : > RAMM0, PAGE = 0
.reset : > RESET, PAGE = 0, TYPE = DSECT /* not used, */

.stack : > RAMM1, PAGE = 1
.ebss : > RAML6, PAGE = 1
.econst : > RAML6, PAGE = 1
.esysmem : > RAML6, PAGE = 1

IQmath : > RAML0_L5, PAGE = 0
IQmathTables : > IQTABLES, PAGE = 0, TYPE = NOLOAD

/* Allocate FPU math areas: */
FPUmathTables : > FPUTABLES, PAGE = 0, TYPE = NOLOAD


/* Uncomment the section below if calling the IQNexp() or IQexp()
functions from the IQMath.lib library in order to utilize the
relevant IQ Math table in Boot ROM (This saves space and Boot ROM
is 1 wait-state). If this section is not uncommented, IQmathTables2
will be loaded into other memory (SARAM, Flash, etc.) and will take
up space, but 0 wait-state is possible.
*/
/*
IQmathTables2 : > IQTABLES2, PAGE = 0, TYPE = NOLOAD
{

IQmath.lib<IQNexpTable.obj> (IQmathTablesRam)

}
*/
/* Uncomment the section below if calling the IQNasin() or IQasin()
functions from the IQMath.lib library in order to utilize the
relevant IQ Math table in Boot ROM (This saves space and Boot ROM
is 1 wait-state). If this section is not uncommented, IQmathTables2
will be loaded into other memory (SARAM, Flash, etc.) and will take
up space, but 0 wait-state is possible.
*/
/*
IQmathTables3 : > IQTABLES3, PAGE = 0, TYPE = NOLOAD
{

IQmath.lib<IQNasinTable.obj> (IQmathTablesRam)

}
*/

}

/*
//===========================================================================
// End of file.
//===========================================================================
*/
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82 changes: 82 additions & 0 deletions hardware/c2000/F28069_flash_kernel/Boot.h
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// TI File $Revision: /main/1 $
// Checkin $Date: August 13, 2012 15:26:33 $
//###########################################################################
//
// FILE: Boot.h
//
// TITLE: Boot ROM Definitions.
//
//###########################################################################
// $TI Release: 2802x Boot ROM V2.00 $
// $Release Date: December 10, 2009 $
//###########################################################################

#ifndef TMS320X2802X_BOOT_H
#define TMS320X2802X_BOOT_H

#include "F2806x_Device.h"

//Lenght of the programming buffer
#define PROG_BUFFER_LENGTH 0x400

//---------------------------------------------------------------------------
// Boot Modes
//
// GPIO37 GPIO34 TRSTn
// TDO CMP2OUT
// Mode EMU x x 1 Emulator connected
// Mode 0 0 0 0 Parallel I/O
// Mode 1 0 1 0 SCI
// Mode 2 1 0 0 wait
// Mode 3 1 1 0 "Get Mode"

#define OTP_KEY 0x3D7BFE
#define OTP_BMODE 0x3D7BFF
#define KEY_VAL 0x55AA

#define PARALLEL_BOOT 0x0000
#define SCI_BOOT 0x0001
#define WAIT_BOOT 0x0002
#define GET_BOOT 0x0003

#define SPI_BOOT 0x0004
#define I2C_BOOT 0x0005
#define OTP_BOOT 0x0006
#define RAM_BOOT 0x000A
#define FLASH_BOOT 0x000B

//---------------------------------------------------------------------------
// Fixed boot entry points:
//
#define FLASH_ENTRY_POINT 0x3F7FF6
#define OTP_ENTRY_POINT 0x3D7800
#define RAM_ENTRY_POINT 0x000000

#define DIVSEL_BY_4 0
#define DIVSEL_BY_2 2
#define DIVSEL_BY_1 3

#define ERROR 1
#define NO_ERROR 0
#define EIGHT_BIT 8
#define SIXTEEN_BIT 16
#define EIGHT_BIT_HEADER 0x08AA
#define SIXTEEN_BIT_HEADER 0x10AA

//---------------------------------------------------------------------------
//
typedef Uint16 (* uint16fptr)();
extern uint16fptr GetWordData,GetOnlyWordData;
extern void (*Flash_CallbackPtr) (void);
extern Uint32 Flash_CPUScaleFactor;
extern Uint16 EmuKey;
extern Uint16 EmuBMode;
#define Device_cal (void (*)(void))0x3D7C80
#define Get_mode (Uint16 (*)(void))0x3D7CC0

//---------------------------------------------------------------------------
// Configured by the boot ROM
//
#define BORTRIM (Uint16 *)0x0986

#endif // end of TMS320x2802x_BOOT_H definition
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