x86 FPU: add semantics for all x86 FPU instructions #394
Closed
Description
While working on #293 I noticed some x86 FPU instructions are not modeled in capstone2llvmir. As discussed in #193, not all of them have to be fully translated into LLVM IR. Also, there might be some already modeled instructions that would be better represented with intrinsic function calls or pseudo assembly function calls. But all of these need to be analyzed and decided how to best represent them. Once decided, I might add info on what to do to every instruction in this list.
List of x86 FPU missing instructions:
- F2XM1
- FBLD
- FBSTP
- FNCLEX
- FCMOVcc
- FFREE
- FISTTP
- FLDCW
- FLDENV
- FPATAN
- FPREM
- FPREM1
- FPTAN
- FRSTOR
- FNSAVE
- FSCALE
- FNSTCW
- FNSTENV
- FNSTSW
- FXAM
- FXRSTOR
- FXRSTOR64
- FXSAVE
- FXSAVE64
- FXTRACT
- FYL2X
- FYL2XP1