moved lefdef config section to prs2net conf

act/act.cc

@@ -26,6 +26,7 @@
 #include <ctype.h>
 #include <unistd.h>
 #include <act/act.h>
+#include <act/tech.h>
 #include "act_parse.h"
 #include "act_walk_X.h"
 #include <config.h>

act/prs2net.conf

@@ -95,3 +95,25 @@ begin sizing
 end
 
 end  
+
+#
+# Should be in the netlist configuration file
+#
+begin lefdef
+  string version "5.6"
+  int micron_conversion 2000
+  real manufacturing_grid 0.0005
+  begin metal_align
+     int x_dim 2
+     int y_dim 1
+  end
+
+  # if 0, then metal2, 4, 6, ... are horizontal (even metal layers)
+  # if 1, then metal1, 3, 5, ... are horizontal (odd metal layers)
+  int horiz_metal 0
+  # pins on metal2
+  int pin_layer 2
+
+  # import .rect files, if found
+  int rect_import 0
+end

act/tech.cc

@@ -89,6 +89,11 @@ void Technology::Init (const char *s)
 
   Assert (NTYPE == 0 && PTYPE == 1, "Hmm");
 
+  if (Technology::T) {
+    /* -- already initialized -- */
+    return;
+  }
+
   Technology::T = new Technology();
 
   A_DECL (char *, contacts);
@@ -678,13 +683,13 @@ void Technology::Init (const char *s)
 
   snprintf (buf+k, BUF_SZ-k-1, "via.nspacing");
   if (config_get_table_size (buf) != sz) {
-    fatal_error ("%s: table size must match number of types", sz);
+    fatal_error ("%s: table size must match number of types (%d)", buf, sz);
   }
   pmat->via_n = config_get_table_int (buf);
 
   snprintf (buf+k, BUF_SZ-k-1, "via.pspacing");
   if (config_get_table_size (buf) != sz) {
-    fatal_error ("%s: table size must match number of types", sz);
+    fatal_error ("%s: table size must match number of types (%d)", buf, sz);
   }
   pmat->via_p = config_get_table_int (buf);
 

tech/Makefile

@@ -23,6 +23,8 @@ EXE=techgen.$(EXT)
 
 TARGETS=$(EXE)
 
+TARGETCONF=layout.conf
+
 SRCS=techgen.cc
 OBJS=$(SRCS:.cc=.o)
 

tech/layout.conf

@@ -257,24 +257,3 @@ begin vias
   int_table m2_gds_bloat 0 0 0
 
 end
-
-
-begin lefdef
-  string version "5.6"
-  int micron_conversion 2000
-  real manufacturing_grid 0.0005
-  begin metal_align
-     int x_dim 2
-     int y_dim 1
-  end
-
-  # if 0, then metal2, 4, 6, ... are horizontal (even metal layers)
-  # if 1, then metal1, 3, 5, ... are horizontal (odd metal layers)
-  int horiz_metal 0
-  # pins on metal2
-  int pin_layer 2
-
-  # import .rect files, if found
-  int rect_import 0
-
-end

transform/v2act/Makefile

@@ -24,6 +24,8 @@ LOCAL_LIB=libverilog_$(EXT).a
 
 TARGETS=$(BINARY) $(BINARY2)
 
+TARGETCONF=s2a.conf
+
 TARGETINCS=v_parse_id.h
 
 LOCAL_LIBOBJS=wrap.o v_parse.o v_walk_X.o vnet.o