mimxrt101x: Add linker script for running from RAM

arturo182 · Apr 19, 2020 · eeb559a · eeb559a
1 parent 5318629
commit eeb559a
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Showing 3 changed files with 123 additions and 3 deletions.
diff --git a/hw/chip/mimxrt10xx/family.mk b/hw/chip/mimxrt10xx/family.mk
@@ -6,8 +6,6 @@ CFLAGS += \
 	-mfpu=fpv5-d16 \
 	-D__ARMVFP__=0 -D__ARMFPV5__=0 \
 	-D__START=main \
-	-DXIP_EXTERNAL_FLASH=1 \
-	-DXIP_BOOT_HEADER_ENABLE=1 \
 	-DCFG_TUSB_MCU=OPT_MCU_MIMXRT10XX \
 	-D__STARTUP_CLEAR_BSS
 
@@ -41,3 +39,15 @@ INC += \
 # For TinyUSB port source
 VENDOR = nxp
 CHIP_FAMILY = transdimension
+
+VARIANT ?= flash
+
+ifeq ($(VARIANT), ram)
+	CFLAGS += \
+		-DXIP_EXTERNAL_FLASH=0 \
+		-DXIP_BOOT_HEADER_ENABLE=0
+else
+	CFLAGS += \
+		-DXIP_EXTERNAL_FLASH=1 \
+		-DXIP_BOOT_HEADER_ENABLE=1
+endif
diff --git a/hw/chip/mimxrt10xx/mimxrt101x/MIMXRT1011DAE5A.mk b/hw/chip/mimxrt10xx/mimxrt101x/MIMXRT1011DAE5A.mk
@@ -4,9 +4,14 @@ include hw/chip/$(TUF2_CHIP_FAMILY)/family.mk
 
 CFLAGS += -DCPU_MIMXRT1011DAE5A
 
+ifeq ($(VARIANT), ram)
+	LD_FILE = ../../hw/chip/$(TUF2_CHIP_FAMILY)/$(TUF2_CHIP_MEMBER)/MIMXRT1011xxxxx_ram.ld
+else
+	LD_FILE = ../../hw/chip/$(TUF2_CHIP_FAMILY)/$(TUF2_CHIP_MEMBER)/MIMXRT1011xxxxx_flexspi_nor.ld
+endif
+
 SRC_C += $(MCU_DIR)/system_MIMXRT1011.c
 
 SRC_S += $(MCU_DIR)/gcc/startup_MIMXRT1011.S
 
-LD_FILE = ../../hw/chip/$(TUF2_CHIP_FAMILY)/$(TUF2_CHIP_MEMBER)/MIMXRT1011xxxxx_flexspi_nor.ld
 
diff --git a/hw/chip/mimxrt10xx/mimxrt101x/MIMXRT1011xxxxx_ram.ld b/hw/chip/mimxrt10xx/mimxrt101x/MIMXRT1011xxxxx_ram.ld
@@ -0,0 +1,105 @@
+ENTRY(Reset_Handler)
+
+_minimum_stack_size = 16K;
+_minimum_heap_size = 0;
+
+MEMORY
+{
+    ITC (rwx)         : ORIGIN = 0x00000000, LENGTH = 32K
+    DTC (rwx)         : ORIGIN = 0x20000000, LENGTH = 32K
+    OCRAM (rwx)       : ORIGIN = 0x20200000, LENGTH = 64K
+}
+
+__StackTop = ORIGIN(OCRAM) + LENGTH(OCRAM);
+_bootloader_dbl_tap = ORIGIN(ITC) + LENGTH(ITC) - 4;
+__RAM_VECTOR_TABLE_SIZE_BYTES = 0;
+
+SECTIONS
+{
+    .ivt :
+    {
+        . = ALIGN(4);
+        KEEP(* (.boot_hdr.ivt))
+        KEEP(* (.boot_hdr.boot_data))
+        KEEP(* (.boot_hdr.dcd_data))
+        . = ALIGN(4);
+    } > DTC
+
+    .interrupts :
+    {
+        __VECTOR_TABLE = .;
+        __VECTOR_RAM = .;
+
+        . = ALIGN(4);
+        KEEP(*(.isr_vector))         /* Startup code */
+        . = ALIGN(4);
+    } > DTC
+
+    .text :
+    {
+        . = ALIGN(4);
+    *(EXCLUDE_FILE(
+        *flexspi_nor_flash_ops.o
+        *fsl_flexspi.o
+    ) .text*)                /* .text* sections (code) */
+        *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
+        . = ALIGN(4);
+    } > DTC
+
+    .ARM.exidx :
+    {
+        *(.ARM.exidx*)
+        *(.gnu.linkonce.armexidx.*)
+        _etext = .;        /* define a global symbol at end of code */
+        __etext = .;       /* define a global symbol at end of code */
+    } > DTC
+
+    /* used by the startup to initialize data */
+    _sidata = .;
+
+    .data : AT (_sidata)
+    {
+        . = ALIGN(4);
+        __data_start__ = .;     /* create a global symbol at data start */
+
+        *(.data*)               /* .data* sections */
+        *flexspi_nor_flash_ops.o(.text*)
+        *fsl_flexspi.o(.text*)
+        . = ALIGN(4);
+
+        __data_end__ = .;       /* define a global symbol at data end */
+    } > DTC
+
+    /* Uninitialized data section */
+    .bss :
+    {
+        . = ALIGN(4);
+        __bss_start__ = .;
+
+        *(.bss*)
+        *(COMMON)
+
+        . = ALIGN(4);
+        __bss_end__ = .;
+        PROVIDE(end = .);
+    } > ITC
+
+    .heap :
+    {
+        . = ALIGN(8);
+        _heap_start = .;    /* define a global symbol at heap start */
+
+        . += _minimum_heap_size;
+
+        __HeapLimit = .;
+    } > ITC
+
+    .stack :
+    {
+        . = ALIGN(8);
+        . += _minimum_stack_size;
+    } > ITC
+
+    .ARM.attributes 0 : { *(.ARM.attributes) }
+}
+