README: fix some nits from R3 rewrite (#16)

apfaudio · Mar 26, 2023 · 4dd77ff · 4dd77ff
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diff --git a/gateware/cal/cal.py b/gateware/cal/cal.py
@@ -3,7 +3,7 @@
 # I/O calibration utility for EURORACK-PMOD
 #
 # Calibration process:
-# 1. Compile gateware and program FPGA with:
+# 1. Compile gateware and program FPGA with these defines in `top.sv`:
 #    - DEBUG_UART
 #    - OUTPUT_CALIBRATION
 # 2. Connect +/- 5V source to all INPUTS
@@ -20,6 +20,7 @@
 # 11. The (calibrated) inputs are used to figure out the calibration constants for
 #     the (uncalibrated) outputs.
 # 12. Press 'x', copy the calibration string to the cal hex file.
+# 13. Be careful to switch back off the `OUTPUT_CALIBRATION` define :)
 #
 # Note: if you check the output calibration with a multimeter, make sure
 # to add a 100K load unless you calibrate with the CAL_OPEN_LOAD option below.

diff --git a/gateware/eurorack_pmod.sv b/gateware/eurorack_pmod.sv
@@ -2,7 +2,8 @@
 // multiple times for multiple PMODs if desired.
 //
 // Contains an instantiation of the I2C driver, calibration module
-// and user-defined DSP core which may be swapped out.
+// and CODEC driver. Calibrated samples to/from this component are
+// handled by external user-defined logic.
 
 `default_nettype none
 

diff --git a/gateware/top.sv b/gateware/top.sv
@@ -1,7 +1,7 @@
 // Top-level module for using `eurorack-pmod` with Icebreaker FPGA.
 //
-// The defines below allow you to select calibration mode, spit samples out
-// UART, or select one of the user-defined 'cores' (DSP modules).
+// To change the DSP core which is used, modify the module type used
+// by the `dsp_core_instance` entity below.
 
 `default_nettype none