Introduce i.MX93 (M33) and IMX93-QSB board support#18460
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mzanders wants to merge 10 commits intoapache:masterfrom
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Introduce i.MX93 (M33) and IMX93-QSB board support#18460mzanders wants to merge 10 commits intoapache:masterfrom
mzanders wants to merge 10 commits intoapache:masterfrom
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- Guard imx9_gpc.h inclusion with CONFIG_IMX9_WFI_AWAKES_AT_SYSTICK to avoid a GPC dependency on chips that lack GPC - Add depends on ARCH_CHIP_IMX95_M7 to IMX9_WFI_AWAKES_AT_SYSTICK since GPC wake configuration is i.MX95-specific - Move XTAL_FREQ and ROOT_CLOCK_OFFSET defines to imx95_clock.h - Make imx9_sm_setrootclock() and imx9_sm_getipfreq() static; they are not referenced outside this translation unit Signed-off-by: Maarten Zanders <maarten@zanders.be>
The GPIO mux range check in imx9_iomux_gpio() used a hardcoded IOMUXC_MUX_CTL_GPIO_IO37_OFFSET as the upper bound, which is i.MX95-specific. Move the define to imx95_iomuxc.h as an alias of the last GPIO_IO entry, and use the named constant in the comparison. No functional change; i.MX95 builds are unaffected. Signed-off-by: Maarten Zanders <maarten@zanders.be>
Use NVIC_IRQ_ENABLE(n) and NVIC_IRQ_PRIORITY(n) macros in imx9_dumpnvic() to iterate over all NVIC registers programmatically based on CONFIG_ARCH_NINTS (IMX9_IRQ_NEXTINT), rather than enumerating named per-range register defines. Output is grouped 4-per-line for priority and 4-per-line for enable registers, matching the original layout. This avoids accessing registers which don't exist when extending the interrupt count. Also replace named NVIC_IRQxx_yy_ENABLE constants in imx9_irqinfo() with NVIC_IRQ_ENABLE(n), avoiding naming conflicts between chips with different IRQ counts. Fix the upper boundary in the >192 IRQ branch from 219 to 224 to align with the 32-interrupt register granularity. Change %08x to %08lx to silence warnings from the compiler for the debug dump. No functional change for existing i.MX95-M7 builds. Signed-off-by: Maarten Zanders <maarten@zanders.be>
…ers. Extract chip-specific constants from imx9_rptun.c and imx9_rsctable.c into new dispatch headers: - hardware/imx9_rsctable.h: VDEV0_VRING_BASE and RESOURCE_TABLE_BASE, selected per ARCH_CHIP define - hardware/imx9_rptun.h: MU_INSTANCE, selected per ARCH_CHIP define Rename the misnamed VRING_SHMEM constant in imx9_rptun.c to RESOURCE_TABLE_BASE, which correctly reflects that this address points to the resource table, not the vring shared memory region. No functional change for i.MX95-M7 builds. Signed-off-by: Maarten Zanders <maarten@zanders.be>
Rename imx95_mu_* functions and CONFIG_IMX9_MU{5,7,8} Kconfig symbols
to imx9_mu_* and CONFIG_IMX95_MU{5,7,8} respectively, decoupling the
MU driver API from the iMX95-specific naming in preparation for
iMX93-M33 support.
Add ARCH_CHIP_IMX95_M7 dependency to the MU instance Kconfig entries
so they are only visible for the appropriate target.
Switch imx9_mu.c to include the generic imx9_memorymap.h instead of
the imx95-specific header.
Fix incorrect help text for MU8 (was copy-pasted from MU5).
Signed-off-by: Maarten Zanders <maarten@zanders.be>
…ection. The menu and choice had the same purpose; keep only the choice. Signed-off-by: Maarten Zanders <maarten@zanders.be>
Add hardware register headers and driver support for the NXP i.MX93 Cortex-M33 core. All new and modified code is guarded by ARCH_CHIP_IMX93_M33 preprocessor defines; existing i.MX95-M7 builds are unaffected. New drivers: - imx9_xcache.c - off core cache init and maintenance - imx9_ccm.c - generic CCM abstraction layer Signed-off-by: Maarten Zanders <maarten@zanders.be>
mzanders
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Area: CI
Arch: arm
acassis
previously approved these changes
Feb 26, 2026
linguini1
reviewed
Feb 26, 2026
linguini1
reviewed
Feb 26, 2026
Contributor
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Thank you @mzanders for a great PR! The testing section is very thorough, the addition of the docs is awesome and a good explanation :) You're a pro already! Looks like just some small CI checks are failing. I'm CC'ing @AndreHeinemans-NXP who I believe has access to IMX95 hardware. Andre, would you be willing/able to test this patch on an IMX95 device to make sure that ostest works after these modifications? |
simbit18
reviewed
Feb 26, 2026
Add board support for the NXP i.MX93 QSB targeting the Cortex-M33
core. Three configurations are provided:
- nsh: run from ITCM (128 kB), LPUART2 console
- nsh-ddr: run from DDR, LPUART2 console
- rpmsg: run from ITCM, RPMsg/OpenAMP transport, NSH on
/dev/tty-nsh via RPMSG_UART_RAW
Linker scripts:
- itcm.ld: vectors + text in ITCM, data in DTCM
- ddr.ld: vectors + text + data in DDR (0x89000000, 16 MB)
Tool to enable local debug interface through USB.
Signed-off-by: Maarten Zanders <maarten@zanders.be>
Add myself to new and common/modified files. Signed-off-by: Maarten Zanders <maarten@zanders.be>
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Yes, whilst writing the documentation I remembered to include the small python script but forget to run checkpatch against it. I hope CI passes now!
That would be awesome! Please get in touch directly @AndreHeinemans-NXP if anything seems off. |
Add a writeup of currently supported features with a picture and block diagram. Signed-off-by: Maarten Zanders <maarten@zanders.be>
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Summary
This PR adds support for the i.MX93 M33 processor, using IMX93-QSB as a test platform.
A lot of reuse was achieved from support for imx93 A55 core (in arm64) and imx95 M7 core (in arm).
Impact
As this is a big PR, the commits are organized in a way to ease the review process.
The first 6 commits reorganize the parts common with iMX95 and prepares these files for addition of iMX93 code. They touch:
On their own, these commits are small and easy to review/analyze. I took special care to reduce the impact on the build of iMX95 as I don't have hardware to test that on. See test results below for proof.
The actual introduction of iMX93 is in done in two commits:
The two final commits handle the codeowners file and add a documentation page.
Use of AI/LLM
As this is my first experience with NuttX, I used Claude Sonnet to help me understand how everything works extensively and get me on the way.
Items that started with a proposal from the LLM but were manually reviewed and modified later:
Next to running all commits through checkpatch.sh, I fed them into Claude Sonnet as well which gave me valuable feedback on typo's, alignments etc.
At no point in the development was any AI allowed to directly edit my code.
Testing
Test case 1: no impact on imx95-evk builds - analysis
Diff results:
Function renames imx95>imx9:
Changed interrupt range test from <219 to <224 in imx9_irqinfo()
Test case 2: interrupt debug output verification
Deploy & run on target (see documentation for procedure).
Test case 3: basic RPMSG functionality
Deploy & run on target (see documentation for procedure).
On Linux side, after launching, run dmesg:
Test case 4: documentation output
Locally generated HTML file looks fine.
Test case 5: run OSTEST
Deploy & run on target (see documentation for procedure).