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kinetis/serial: Enable RTS as GPIO for RS485CONTROL #18417

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kinetis/serial: Enable RTS as GPIO for RS485CONTROL #18417

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66 changes: 66 additions & 0 deletions arch/arm/src/kinetis/Kconfig
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Original file line number Diff line number Diff line change
Expand Up @@ -1409,6 +1409,17 @@ config UART0_RS485CONTROL
---help---
Enable RS-485 transmit enable on UART0.

config UART0_RS485CONTROL_RTSISGPIO
bool "RTS pin of the UART0 is GPIO"
default n
depends on UART0_RS485CONTROL
---help---
RTS pin of the UART0 is wired to something else than the chip's
ALT pin with UART0 RTS functionality.

The GPIO, to which the UART0's RTS pin is wired to, is set to
high when sending data and low otherwise.

config UART1_RS485CONTROL
bool "Use UART1 RTS as RS-485 transmit enable"
default n
Expand All @@ -1417,6 +1428,17 @@ config UART1_RS485CONTROL
---help---
Enable RS-485 transmit enable on UART1.

config UART1_RS485CONTROL_RTSISGPIO
bool "RTS pin of the UART1 is GPIO"
default n
depends on UART1_RS485CONTROL
---help---
RTS pin of the UART1 is wired to something else than the chip's
ALT pin with UART1 RTS functionality.

The GPIO, to which the UART1's RTS pin is wired to, is set to
high when sending data and low otherwise.

config UART2_RS485CONTROL
bool "Use UART2 RTS as RS-485 transmit enable"
default n
Expand All @@ -1425,6 +1447,17 @@ config UART2_RS485CONTROL
---help---
Enable RS-485 transmit enable on UART2.

config UART2_RS485CONTROL_RTSISGPIO
bool "RTS pin of the UART2 is GPIO"
default n
depends on UART2_RS485CONTROL
---help---
RTS pin of the UART2 is wired to something else than the chip's
ALT pin with UART2 RTS functionality.

The GPIO, to which the UART2's RTS pin is wired to, is set to
high when sending data and low otherwise.

config UART3_RS485CONTROL
bool "Use UART3 RTS as RS-485 transmit enable"
default n
Expand All @@ -1433,6 +1466,17 @@ config UART3_RS485CONTROL
---help---
Enable RS-485 transmit enable on UART3.

config UART3_RS485CONTROL_RTSISGPIO
bool "RTS pin of the UART3 is GPIO"
default n
depends on UART3_RS485CONTROL
---help---
RTS pin of the UART3 is wired to something else than the chip's
ALT pin with UART3 RTS functionality.

The GPIO, to which the UART3's RTS pin is wired to, is set to
high when sending data and low otherwise.

config UART4_RS485CONTROL
bool "Use UART4 RTS as RS-485 transmit enable"
default n
Expand All @@ -1441,6 +1485,17 @@ config UART4_RS485CONTROL
---help---
Enable RS-485 transmit enable on UART4.

config UART4_RS485CONTROL_RTSISGPIO
bool "RTS pin of the UART4 is GPIO"
default n
depends on UART4_RS485CONTROL
---help---
RTS pin of the UART4 is wired to something else than the chip's
ALT pin with UART4 RTS functionality.

The GPIO, to which the UART4's RTS pin is wired to, is set to
high when sending data and low otherwise.

config UART5_RS485CONTROL
bool "Use UART5 RTS as RS-485 transmit enable"
default n
Expand All @@ -1449,6 +1504,17 @@ config UART5_RS485CONTROL
---help---
Enable RS-485 transmit enable on UART5.

config UART5_RS485CONTROL_RTSISGPIO
bool "RTS pin of the UART5 is GPIO"
default n
depends on UART5_RS485CONTROL
---help---
RTS pin of the UART5 is wired to something else than the chip's
ALT pin with UART5 RTS functionality.

The GPIO, to which the UART5's RTS pin is wired to, is set to
high when sending data and low otherwise.

endmenu # Kinetis RS485 transmit driver support

endmenu # Kinetis UART Configuration
Expand Down
95 changes: 95 additions & 0 deletions arch/arm/src/kinetis/kinetis_serial.c
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Original file line number Diff line number Diff line change
Expand Up @@ -1896,7 +1896,102 @@ static int up_dma_nextrx(struct up_dev_s *priv)
static void up_send(struct uart_dev_s *dev, int ch)
{
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;

#if defined(CONFIG_UART0_RS485CONTROL_RTSISGPIO)
if (&g_uart0priv == priv)
{
kinetis_gpiowrite(g_uart0priv.rts_gpio, 1);
}

#endif
#if defined(CONFIG_UART1_RS485CONTROL_RTSISGPIO)
if (&g_uart1priv == priv)
{
kinetis_gpiowrite(g_uart1priv.rts_gpio, 1);
}

#endif
#if defined(CONFIG_UART2_RS485CONTROL_RTSISGPIO)
if (&g_uart2priv == priv)
{
kinetis_gpiowrite(g_uart2priv.rts_gpio, 1);
}

#endif
#if defined(CONFIG_UART3_RS485CONTROL_RTSISGPIO)
if (&g_uart3priv == priv)
{
kinetis_gpiowrite(g_uart3priv.rts_gpio, 1);
}

#endif
#if defined(CONFIG_UART4_RS485CONTROL_RTSISGPIO)
if (&g_uart4priv == priv)
{
kinetis_gpiowrite(g_uart4priv.rts_gpio, 1);
}

#endif
#if defined(CONFIG_UART5_RS485CONTROL_RTSISGPIO)
if (&g_uart5priv == priv)
{
kinetis_gpiowrite(g_uart5priv.rts_gpio, 1);
}

#endif

up_serialout(priv, KINETIS_UART_D_OFFSET, (uint8_t)ch);

#if defined(CONFIG_UART0_RS485CONTROL_RTSISGPIO)
if (&g_uart0priv == priv)
{
/* We need some time before RTS is set low. 150 us works for LTM2881. */

up_udelay(150);
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@michallenc michallenc Feb 22, 2026

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I think it would be better to disable the GPIO once UART_S1_TC interrupt is received instead of magic 150 us wait.

kinetis_gpiowrite(g_uart0priv.rts_gpio, 0);
}

#endif
#if defined(CONFIG_UART1_RS485CONTROL_RTSISGPIO)
if (&g_uart1priv == priv)
{
up_udelay(150);
kinetis_gpiowrite(g_uart1priv.rts_gpio, 0);
}

#endif
#if defined(CONFIG_UART2_RS485CONTROL_RTSISGPIO)
if (&g_uart2priv == priv)
{
up_udelay(150);
kinetis_gpiowrite(g_uart2priv.rts_gpio, 0);
}

#endif
#if defined(CONFIG_UART3_RS485CONTROL_RTSISGPIO)
if (&g_uart3priv == priv)
{
up_udelay(150);
kinetis_gpiowrite(g_uart3priv.rts_gpio, 0);
}

#endif
#if defined(CONFIG_UART4_RS485CONTROL_RTSISGPIO)
if (&g_uart4priv == priv)
{
up_udelay(150);
kinetis_gpiowrite(g_uart4priv.rts_gpio, 0);
}

#endif
#if defined(CONFIG_UART5_RS485CONTROL_RTSISGPIO)
if (&g_uart5priv == priv)
{
up_udelay(150);
kinetis_gpiowrite(g_uart5priv.rts_gpio, 0);
}

#endif
}

/****************************************************************************
Expand Down
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