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espressif: Fixes for Quadrature Encoder mode of PCNT peripheral #16391

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Merged
acassis merged 5 commits into from
May 16, 2025
Merged

espressif: Fixes for Quadrature Encoder mode of PCNT peripheral #16391

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d6a8cb6
esp32[c6|h2|s3|s2]: Fix assignment of Edge/Level GPIO pins in PCNT
Vajnar Apr 27, 2025
6fe0092
xtensa|espressif: Unify Quadrature Encoder handling among units
Vajnar Apr 27, 2025
3922a4f
esp32[c6|h2|s2|s3]: Assign Edge/Level GPIO pin numbers when in Quadra…
Vajnar Apr 27, 2025
6c98a03
Select SENSORS_QENCODER as dependency for Quadrature Encoder mode of …
Vajnar May 10, 2025
0ba8fd4
Update defconfigs
Vajnar May 16, 2025
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10 changes: 6 additions & 4 deletions arch/risc-v/src/common/espressif/Kconfig
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Original file line number Diff line number Diff line change
Expand Up @@ -654,6 +654,8 @@ config ESP_PCNT_TEST_MODE
config ESP_PCNT_AS_QE
bool
default n
select SENSORS
select SENSORS_QENCODER

config ESP_PCNT_U0
bool "Enable PCNT Unit 0"
Expand All @@ -673,15 +675,15 @@ config ESP_PCNT_U0_CH0_EDGE_PIN

config ESP_PCNT_U0_CH0_LEVEL_PIN
int "PCNT_U0 CH0 Level/Control Pin Number"
default 4 if !ESP_PCNT_U0_QE
default -1 if ESP_PCNT_U0_QE
default 4
range -1 39
depends on !ESP_PCNT_U0_QE

config ESP_PCNT_U0_CH1_EDGE_PIN
int "PCNT_U0 CH1 Edge/Pulse Pin Number"
default 0 if !ESP_PCNT_U0_QE
default -1 if ESP_PCNT_U0_QE
default 0
range -1 39
depends on !ESP_PCNT_U0_QE

config ESP_PCNT_U0_CH1_LEVEL_PIN
int "PCNT_U0 CH1 Level/Control Pin Number"
Expand Down
10 changes: 6 additions & 4 deletions arch/xtensa/src/common/espressif/Kconfig
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -167,6 +167,8 @@ config ESP_PCNT_TEST_MODE
config ESP_PCNT_AS_QE
bool
default n
select SENSORS
select SENSORS_QENCODER

config ESP_PCNT_U0
bool "Enable PCNT Unit 0"
Expand All @@ -186,15 +188,15 @@ config ESP_PCNT_U0_CH0_EDGE_PIN

config ESP_PCNT_U0_CH0_LEVEL_PIN
int "PCNT_U0 CH0 Level/Control Pin Number"
default 4 if !ESP_PCNT_U0_QE
default -1 if ESP_PCNT_U0_QE
default 4
range -1 39
depends on !ESP_PCNT_U0_QE

config ESP_PCNT_U0_CH1_EDGE_PIN
int "PCNT_U0 CH1 Edge/Pulse Pin Number"
default 0 if !ESP_PCNT_U0_QE
default -1 if ESP_PCNT_U0_QE
default 0
range -1 39
depends on !ESP_PCNT_U0_QE

config ESP_PCNT_U0_CH1_LEVEL_PIN
int "PCNT_U0 CH1 Level/Control Pin Number"
Expand Down
38 changes: 35 additions & 3 deletions boards/risc-v/esp32c6/common/src/esp_board_pcnt.c
View file
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Original file line number Diff line number Diff line change
Expand Up @@ -194,14 +194,22 @@ int board_pcnt_initialize(void)
};

#ifdef CONFIG_ESP_PCNT_U0
#ifdef CONFIG_ESP_PCNT_U0_QE
chan0_cfg.edge_gpio_num = CONFIG_ESP_PCNT_U0_CH0_EDGE_PIN;
chan0_cfg.level_gpio_num = CONFIG_ESP_PCNT_U0_CH1_LEVEL_PIN;

chan1_cfg.edge_gpio_num = CONFIG_ESP_PCNT_U0_CH1_LEVEL_PIN;
chan1_cfg.level_gpio_num = CONFIG_ESP_PCNT_U0_CH0_EDGE_PIN;
#else
chan0_cfg.edge_gpio_num = CONFIG_ESP_PCNT_U0_CH0_EDGE_PIN;
chan0_cfg.level_gpio_num = CONFIG_ESP_PCNT_U0_CH0_LEVEL_PIN;

chan1_cfg.edge_gpio_num = CONFIG_ESP_PCNT_U0_CH1_EDGE_PIN;
chan1_cfg.level_gpio_num = CONFIG_ESP_PCNT_U0_CH1_LEVEL_PIN;
#endif
#ifdef CONFIG_ESP_PCNT_TEST_MODE
chan0_cfg.flags = ESP_PCNT_CHAN_IO_LOOPBACK;
#endif

chan1_cfg.edge_gpio_num = CONFIG_ESP_PCNT_U0_CH1_LEVEL_PIN;
chan1_cfg.level_gpio_num = CONFIG_ESP_PCNT_U0_CH1_EDGE_PIN;
#ifndef CONFIG_ESP_PCNT_U0_FILTER_EN
glitch_threshold = 0;
#else
Expand Down Expand Up @@ -230,11 +238,19 @@ int board_pcnt_initialize(void)
#endif

#ifdef CONFIG_ESP_PCNT_U1
#ifdef CONFIG_ESP_PCNT_U1_QE
chan0_cfg.edge_gpio_num = CONFIG_ESP_PCNT_U1_CH0_EDGE_PIN;
chan0_cfg.level_gpio_num = CONFIG_ESP_PCNT_U1_CH1_LEVEL_PIN;

chan1_cfg.edge_gpio_num = CONFIG_ESP_PCNT_U1_CH1_LEVEL_PIN;
chan1_cfg.level_gpio_num = CONFIG_ESP_PCNT_U1_CH0_EDGE_PIN;
#else
chan0_cfg.edge_gpio_num = CONFIG_ESP_PCNT_U1_CH0_EDGE_PIN;
chan0_cfg.level_gpio_num = CONFIG_ESP_PCNT_U1_CH0_LEVEL_PIN;

chan1_cfg.edge_gpio_num = CONFIG_ESP_PCNT_U1_CH1_EDGE_PIN;
chan1_cfg.level_gpio_num = CONFIG_ESP_PCNT_U1_CH1_LEVEL_PIN;
#endif
#ifndef CONFIG_ESP_PCNT_U1_FILTER_EN
glitch_threshold = 0;
#else
Expand Down Expand Up @@ -263,11 +279,19 @@ int board_pcnt_initialize(void)
#endif

#ifdef CONFIG_ESP_PCNT_U2
#ifdef CONFIG_ESP_PCNT_U2_QE
chan0_cfg.edge_gpio_num = CONFIG_ESP_PCNT_U2_CH0_EDGE_PIN;
chan0_cfg.level_gpio_num = CONFIG_ESP_PCNT_U2_CH1_LEVEL_PIN;

chan1_cfg.edge_gpio_num = CONFIG_ESP_PCNT_U2_CH1_LEVEL_PIN;
chan1_cfg.level_gpio_num = CONFIG_ESP_PCNT_U2_CH0_EDGE_PIN;
#else
chan0_cfg.edge_gpio_num = CONFIG_ESP_PCNT_U2_CH0_EDGE_PIN;
chan0_cfg.level_gpio_num = CONFIG_ESP_PCNT_U2_CH0_LEVEL_PIN;

chan1_cfg.edge_gpio_num = CONFIG_ESP_PCNT_U2_CH1_EDGE_PIN;
chan1_cfg.level_gpio_num = CONFIG_ESP_PCNT_U2_CH1_LEVEL_PIN;
#endif
#ifndef CONFIG_ESP_PCNT_U2_FILTER_EN
glitch_threshold = 0;
#else
Expand Down Expand Up @@ -297,11 +321,19 @@ int board_pcnt_initialize(void)
#endif

#ifdef CONFIG_ESP_PCNT_U3
#ifdef CONFIG_ESP_PCNT_U3_QE
chan0_cfg.edge_gpio_num = CONFIG_ESP_PCNT_U3_CH0_EDGE_PIN;
chan0_cfg.level_gpio_num = CONFIG_ESP_PCNT_U3_CH1_LEVEL_PIN;

chan1_cfg.edge_gpio_num = CONFIG_ESP_PCNT_U3_CH1_LEVEL_PIN;
chan1_cfg.level_gpio_num = CONFIG_ESP_PCNT_U3_CH0_EDGE_PIN;
#else
chan0_cfg.edge_gpio_num = CONFIG_ESP_PCNT_U3_CH0_EDGE_PIN;
chan0_cfg.level_gpio_num = CONFIG_ESP_PCNT_U3_CH0_LEVEL_PIN;

chan1_cfg.edge_gpio_num = CONFIG_ESP_PCNT_U3_CH1_EDGE_PIN;
chan1_cfg.level_gpio_num = CONFIG_ESP_PCNT_U3_CH1_LEVEL_PIN;
#endif
#ifndef CONFIG_ESP_PCNT_U3_FILTER_EN
glitch_threshold = 0;
#else
Expand Down
2 changes: 0 additions & 2 deletions boards/risc-v/esp32c6/esp32c6-devkitc/configs/qencoder/defconfig
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -46,8 +46,6 @@ CONFIG_PREALLOC_TIMERS=0
CONFIG_RR_INTERVAL=200
CONFIG_SCHED_BACKTRACE=y
CONFIG_SCHED_WAITPID=y
CONFIG_SENSORS=y
CONFIG_SENSORS_QENCODER=y
CONFIG_START_DAY=29
CONFIG_START_MONTH=11
CONFIG_START_YEAR=2019
Expand Down
38 changes: 35 additions & 3 deletions boards/risc-v/esp32h2/common/src/esp_board_pcnt.c
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -194,14 +194,22 @@ int board_pcnt_initialize(void)
};

#ifdef CONFIG_ESP_PCNT_U0
#ifdef CONFIG_ESP_PCNT_U0_QE
chan0_cfg.edge_gpio_num = CONFIG_ESP_PCNT_U0_CH0_EDGE_PIN;
chan0_cfg.level_gpio_num = CONFIG_ESP_PCNT_U0_CH1_LEVEL_PIN;

chan1_cfg.edge_gpio_num = CONFIG_ESP_PCNT_U0_CH1_LEVEL_PIN;
chan1_cfg.level_gpio_num = CONFIG_ESP_PCNT_U0_CH0_EDGE_PIN;
#else
chan0_cfg.edge_gpio_num = CONFIG_ESP_PCNT_U0_CH0_EDGE_PIN;
chan0_cfg.level_gpio_num = CONFIG_ESP_PCNT_U0_CH0_LEVEL_PIN;

chan1_cfg.edge_gpio_num = CONFIG_ESP_PCNT_U0_CH1_EDGE_PIN;
chan1_cfg.level_gpio_num = CONFIG_ESP_PCNT_U0_CH1_LEVEL_PIN;
#endif
#ifdef CONFIG_ESP_PCNT_TEST_MODE
chan0_cfg.flags = ESP_PCNT_CHAN_IO_LOOPBACK;
#endif

chan1_cfg.edge_gpio_num = CONFIG_ESP_PCNT_U0_CH1_LEVEL_PIN;
chan1_cfg.level_gpio_num = CONFIG_ESP_PCNT_U0_CH1_EDGE_PIN;
#ifndef CONFIG_ESP_PCNT_U0_FILTER_EN
glitch_threshold = 0;
#else
Expand Down Expand Up @@ -230,11 +238,19 @@ int board_pcnt_initialize(void)
#endif

#ifdef CONFIG_ESP_PCNT_U1
#ifdef CONFIG_ESP_PCNT_U1_QE
chan0_cfg.edge_gpio_num = CONFIG_ESP_PCNT_U1_CH0_EDGE_PIN;
chan0_cfg.level_gpio_num = CONFIG_ESP_PCNT_U1_CH1_LEVEL_PIN;

chan1_cfg.edge_gpio_num = CONFIG_ESP_PCNT_U1_CH1_LEVEL_PIN;
chan1_cfg.level_gpio_num = CONFIG_ESP_PCNT_U1_CH0_EDGE_PIN;
#else
chan0_cfg.edge_gpio_num = CONFIG_ESP_PCNT_U1_CH0_EDGE_PIN;
chan0_cfg.level_gpio_num = CONFIG_ESP_PCNT_U1_CH0_LEVEL_PIN;

chan1_cfg.edge_gpio_num = CONFIG_ESP_PCNT_U1_CH1_EDGE_PIN;
chan1_cfg.level_gpio_num = CONFIG_ESP_PCNT_U1_CH1_LEVEL_PIN;
#endif
#ifndef CONFIG_ESP_PCNT_U1_FILTER_EN
glitch_threshold = 0;
#else
Expand Down Expand Up @@ -263,11 +279,19 @@ int board_pcnt_initialize(void)
#endif

#ifdef CONFIG_ESP_PCNT_U2
#ifdef CONFIG_ESP_PCNT_U2_QE
chan0_cfg.edge_gpio_num = CONFIG_ESP_PCNT_U2_CH0_EDGE_PIN;
chan0_cfg.level_gpio_num = CONFIG_ESP_PCNT_U2_CH1_LEVEL_PIN;

chan1_cfg.edge_gpio_num = CONFIG_ESP_PCNT_U2_CH1_LEVEL_PIN;
chan1_cfg.level_gpio_num = CONFIG_ESP_PCNT_U2_CH0_EDGE_PIN;
#else
chan0_cfg.edge_gpio_num = CONFIG_ESP_PCNT_U2_CH0_EDGE_PIN;
chan0_cfg.level_gpio_num = CONFIG_ESP_PCNT_U2_CH0_LEVEL_PIN;

chan1_cfg.edge_gpio_num = CONFIG_ESP_PCNT_U2_CH1_EDGE_PIN;
chan1_cfg.level_gpio_num = CONFIG_ESP_PCNT_U2_CH1_LEVEL_PIN;
#endif
#ifndef CONFIG_ESP_PCNT_U2_FILTER_EN
glitch_threshold = 0;
#else
Expand Down Expand Up @@ -297,11 +321,19 @@ int board_pcnt_initialize(void)
#endif

#ifdef CONFIG_ESP_PCNT_U3
#ifdef CONFIG_ESP_PCNT_U3_QE
chan0_cfg.edge_gpio_num = CONFIG_ESP_PCNT_U3_CH0_EDGE_PIN;
chan0_cfg.level_gpio_num = CONFIG_ESP_PCNT_U3_CH1_LEVEL_PIN;

chan1_cfg.edge_gpio_num = CONFIG_ESP_PCNT_U3_CH1_LEVEL_PIN;
chan1_cfg.level_gpio_num = CONFIG_ESP_PCNT_U3_CH0_EDGE_PIN;
#else
chan0_cfg.edge_gpio_num = CONFIG_ESP_PCNT_U3_CH0_EDGE_PIN;
chan0_cfg.level_gpio_num = CONFIG_ESP_PCNT_U3_CH0_LEVEL_PIN;

chan1_cfg.edge_gpio_num = CONFIG_ESP_PCNT_U3_CH1_EDGE_PIN;
chan1_cfg.level_gpio_num = CONFIG_ESP_PCNT_U3_CH1_LEVEL_PIN;
#endif
#ifndef CONFIG_ESP_PCNT_U3_FILTER_EN
glitch_threshold = 0;
#else
Expand Down
2 changes: 0 additions & 2 deletions boards/risc-v/esp32h2/esp32h2-devkit/configs/qencoder/defconfig
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -45,8 +45,6 @@ CONFIG_PREALLOC_TIMERS=0
CONFIG_RR_INTERVAL=200
CONFIG_SCHED_BACKTRACE=y
CONFIG_SCHED_WAITPID=y
CONFIG_SENSORS=y
CONFIG_SENSORS_QENCODER=y
CONFIG_START_DAY=29
CONFIG_START_MONTH=11
CONFIG_START_YEAR=2019
Expand Down
38 changes: 35 additions & 3 deletions boards/xtensa/esp32/common/src/esp32_board_pcnt.c
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -193,14 +193,22 @@ int board_pcnt_initialize(void)
};

#ifdef CONFIG_ESP_PCNT_U0
#ifdef CONFIG_ESP_PCNT_U0_QE
chan0_cfg.edge_gpio_num = CONFIG_ESP_PCNT_U0_CH0_EDGE_PIN;
chan0_cfg.level_gpio_num = CONFIG_ESP_PCNT_U0_CH1_LEVEL_PIN;

chan1_cfg.edge_gpio_num = CONFIG_ESP_PCNT_U0_CH1_LEVEL_PIN;
chan1_cfg.level_gpio_num = CONFIG_ESP_PCNT_U0_CH0_EDGE_PIN;
#else
chan0_cfg.edge_gpio_num = CONFIG_ESP_PCNT_U0_CH0_EDGE_PIN;
chan0_cfg.level_gpio_num = CONFIG_ESP_PCNT_U0_CH0_LEVEL_PIN;

chan1_cfg.edge_gpio_num = CONFIG_ESP_PCNT_U0_CH1_EDGE_PIN;
chan1_cfg.level_gpio_num = CONFIG_ESP_PCNT_U0_CH1_LEVEL_PIN;
#endif
#ifdef CONFIG_ESP_PCNT_TEST_MODE
chan0_cfg.flags = ESP_PCNT_CHAN_IO_LOOPBACK;
#endif

chan1_cfg.edge_gpio_num = CONFIG_ESP_PCNT_U0_CH1_LEVEL_PIN;
chan1_cfg.level_gpio_num = CONFIG_ESP_PCNT_U0_CH1_EDGE_PIN;
#ifndef CONFIG_ESP_PCNT_U0_FILTER_EN
glitch_threshold = 0;
#else
Expand Down Expand Up @@ -229,11 +237,19 @@ int board_pcnt_initialize(void)
#endif

#ifdef CONFIG_ESP_PCNT_U1
#ifdef CONFIG_ESP_PCNT_U1_QE
chan0_cfg.edge_gpio_num = CONFIG_ESP_PCNT_U1_CH0_EDGE_PIN;
chan0_cfg.level_gpio_num = CONFIG_ESP_PCNT_U1_CH1_LEVEL_PIN;

chan1_cfg.edge_gpio_num = CONFIG_ESP_PCNT_U1_CH1_LEVEL_PIN;
chan1_cfg.level_gpio_num = CONFIG_ESP_PCNT_U1_CH0_EDGE_PIN;
#else
chan0_cfg.edge_gpio_num = CONFIG_ESP_PCNT_U1_CH0_EDGE_PIN;
chan0_cfg.level_gpio_num = CONFIG_ESP_PCNT_U1_CH0_LEVEL_PIN;

chan1_cfg.edge_gpio_num = CONFIG_ESP_PCNT_U1_CH1_EDGE_PIN;
chan1_cfg.level_gpio_num = CONFIG_ESP_PCNT_U1_CH1_LEVEL_PIN;
#endif
#ifndef CONFIG_ESP_PCNT_U1_FILTER_EN
glitch_threshold = 0;
#else
Expand Down Expand Up @@ -262,11 +278,19 @@ int board_pcnt_initialize(void)
#endif

#ifdef CONFIG_ESP_PCNT_U2
#ifdef CONFIG_ESP_PCNT_U2_QE
chan0_cfg.edge_gpio_num = CONFIG_ESP_PCNT_U2_CH0_EDGE_PIN;
chan0_cfg.level_gpio_num = CONFIG_ESP_PCNT_U2_CH1_LEVEL_PIN;

chan1_cfg.edge_gpio_num = CONFIG_ESP_PCNT_U2_CH1_LEVEL_PIN;
chan1_cfg.level_gpio_num = CONFIG_ESP_PCNT_U2_CH0_EDGE_PIN;
#else
chan0_cfg.edge_gpio_num = CONFIG_ESP_PCNT_U2_CH0_EDGE_PIN;
chan0_cfg.level_gpio_num = CONFIG_ESP_PCNT_U2_CH0_LEVEL_PIN;

chan1_cfg.edge_gpio_num = CONFIG_ESP_PCNT_U2_CH1_EDGE_PIN;
chan1_cfg.level_gpio_num = CONFIG_ESP_PCNT_U2_CH1_LEVEL_PIN;
#endif
#ifndef CONFIG_ESP_PCNT_U2_FILTER_EN
glitch_threshold = 0;
#else
Expand Down Expand Up @@ -296,11 +320,19 @@ int board_pcnt_initialize(void)
#endif

#ifdef CONFIG_ESP_PCNT_U3
#ifdef CONFIG_ESP_PCNT_U3_QE
chan0_cfg.edge_gpio_num = CONFIG_ESP_PCNT_U3_CH0_EDGE_PIN;
chan0_cfg.level_gpio_num = CONFIG_ESP_PCNT_U3_CH1_LEVEL_PIN;

chan1_cfg.edge_gpio_num = CONFIG_ESP_PCNT_U3_CH1_LEVEL_PIN;
chan1_cfg.level_gpio_num = CONFIG_ESP_PCNT_U3_CH0_EDGE_PIN;
#else
chan0_cfg.edge_gpio_num = CONFIG_ESP_PCNT_U3_CH0_EDGE_PIN;
chan0_cfg.level_gpio_num = CONFIG_ESP_PCNT_U3_CH0_LEVEL_PIN;

chan1_cfg.edge_gpio_num = CONFIG_ESP_PCNT_U3_CH1_EDGE_PIN;
chan1_cfg.level_gpio_num = CONFIG_ESP_PCNT_U3_CH1_LEVEL_PIN;
#endif
#ifndef CONFIG_ESP_PCNT_U3_FILTER_EN
glitch_threshold = 0;
#else
Expand Down
2 changes: 0 additions & 2 deletions boards/xtensa/esp32/esp32-devkitc/configs/qencoder/defconfig
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -47,8 +47,6 @@ CONFIG_RAM_SIZE=114688
CONFIG_RAM_START=0x20000000
CONFIG_RR_INTERVAL=200
CONFIG_SCHED_WAITPID=y
CONFIG_SENSORS=y
CONFIG_SENSORS_QENCODER=y
CONFIG_START_DAY=6
CONFIG_START_MONTH=12
CONFIG_START_YEAR=2011
Expand Down
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