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Merge pull request #108 from dan-fritchman/genalpha
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Add GenAlpha
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aolofsson authored Sep 2, 2024
2 parents 0e4319b + ed5ba67 commit fbc6e2e
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1 change: 1 addition & 0 deletions README.md
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|[Forefrontrf](https://forefrontrf.com) | RF | 2020 | UK |Wireless communication devices |
|[Fractile](https://fractile.ai) | AI | 2022 | UK |AI accelerator for LLMs |
|[Furiosa](https://furiosa.ai) | AI | 2017 | KR |AI coprocessors |
|[Generation Alpha Transistor](https://generation-alpha-transistor.com) | EDA | 2024 | US |Circuit & Layout GUI Copilot |
|[Gemesys](https://gemesys.tech) | AI | 2021 | DE |Analog AI processors |
|[getinstachip](https://getinstachip.com) | EDA | 2024 | US |Intelligent package manager for Verilog |
|[Gowin](https://gowinsemi.com) | FPGA | 2014 | CN |FPGA chip products |
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1 change: 1 addition & 0 deletions startups.csv
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Expand Up @@ -86,6 +86,7 @@ FMC,ferroelectric-memory.com,MFG,DE,2015,Ferroelectric non-volatile random acces
Forefrontrf,forefrontrf.com,RF,UK,2020,Wireless communication devices
Fractile,fractile.ai,AI,UK,2022,AI accelerator for LLMs
Furiosa,furiosa.ai,AI,KR,2017,AI coprocessors
Generation Alpha Transistor,generation-alpha-transistor.com,EDA,US,2024,Circuit & Layout GUI Copilot
Gemesys,gemesys.tech,AI,DE,2021,Analog AI processors
getinstachip,getinstachip.com,EDA,US,2024,Intelligent package manager for Verilog
Gowin,gowinsemi.com,FPGA,CN,2014,FPGA chip products
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