ports/esp32: Use capability defines to configure features.

Signed-off-by: Andrew Leech <andrew@alelec. net>
andrewleech · Sep 4, 2024 · a929609 · a929609
1 parent cabb4eb
commit a929609
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Showing 9 changed files with 44 additions and 46 deletions.
diff --git a/ports/esp32/adc.c b/ports/esp32/adc.c
@@ -33,31 +33,29 @@
 #define DEFAULT_VREF 1100
 
 void madcblock_bits_helper(machine_adc_block_obj_t *self, mp_int_t bits) {
-    switch (bits) {
-        #if CONFIG_IDF_TARGET_ESP32
-        case 9:
-            self->width = ADC_WIDTH_BIT_9;
-            break;
-        case 10:
-            self->width = ADC_WIDTH_BIT_10;
-            break;
-        case 11:
-            self->width = ADC_WIDTH_BIT_11;
-            break;
-        #endif
-        #if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C6
-        case 12:
-            self->width = ADC_WIDTH_BIT_12;
-            break;
-        #endif
-        #if CONFIG_IDF_TARGET_ESP32S2
-        case 13:
-            self->width = ADC_WIDTH_BIT_13;
-            break;
-        #endif
-        default:
-            mp_raise_ValueError(MP_ERROR_TEXT("invalid bits"));
+    if (bits >= SOC_ADC_RTC_MIN_BITWIDTH && bits <= SOC_ADC_RTC_MIN_BITWIDTH) {
+        switch (bits) {
+            case 9:
+                self->width = ADC_BITWIDTH_9;
+                break;
+            case 10:
+                self->width = ADC_BITWIDTH_10;
+                break;
+            case 11:
+                self->width = ADC_BITWIDTH_11;
+                break;
+            case 12:
+                self->width = ADC_BITWIDTH_12;
+                break;
+            case 13:
+                self->width = ADC_BITWIDTH_13;
+                break;
+            default:
+        }
+    } else {
+        mp_raise_ValueError(MP_ERROR_TEXT("invalid bits"));
     }
+
     self->bits = bits;
 
     if (self->unit_id == ADC_UNIT_1) {

diff --git a/ports/esp32/machine_adc.c b/ports/esp32/machine_adc.c
@@ -35,7 +35,7 @@
 #define ADCBLOCK1 (&madcblock_obj[0])
 #define ADCBLOCK2 (&madcblock_obj[1])
 
-#if CONFIG_IDF_TARGET_ESP32
+#if SOC_ADC_RTC_MIN_BITWIDTH <= 9 && SOC_ADC_RTC_MIN_BITWIDTH >= 11
 #define MICROPY_PY_MACHINE_ADC_CLASS_CONSTANTS_WIDTH_9_10_11 \
     { MP_ROM_QSTR(MP_QSTR_WIDTH_9BIT), MP_ROM_INT(9) }, \
     { MP_ROM_QSTR(MP_QSTR_WIDTH_10BIT), MP_ROM_INT(10) }, \
@@ -44,14 +44,14 @@
 #define MICROPY_PY_MACHINE_ADC_CLASS_CONSTANTS_WIDTH_9_10_11
 #endif
 
-#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32S3
+#if SOC_ADC_RTC_MIN_BITWIDTH <= 12 && SOC_ADC_RTC_MIN_BITWIDTH >= 12
 #define MICROPY_PY_MACHINE_ADC_CLASS_CONSTANTS_WIDTH_12 \
     { MP_ROM_QSTR(MP_QSTR_WIDTH_12BIT), MP_ROM_INT(12) },
 #else
 #define MICROPY_PY_MACHINE_ADC_CLASS_CONSTANTS_WIDTH_12
 #endif
 
-#if CONFIG_IDF_TARGET_ESP32S2
+#if SOC_ADC_RTC_MIN_BITWIDTH <= 13 && SOC_ADC_RTC_MIN_BITWIDTH >= 13
 #define MICROPY_PY_MACHINE_ADC_CLASS_CONSTANTS_WIDTH_13 \
     { MP_ROM_QSTR(MP_QSTR_WIDTH_13BIT), MP_ROM_INT(13) },
 #else

diff --git a/ports/esp32/machine_adc_block.c b/ports/esp32/machine_adc_block.c
@@ -32,13 +32,8 @@
 #include "driver/adc.h"
 
 machine_adc_block_obj_t madcblock_obj[] = {
-    #if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C6
-    {{&machine_adc_block_type}, ADC_UNIT_1, 12, -1, {0}},
-    {{&machine_adc_block_type}, ADC_UNIT_2, 12, -1, {0}},
-    #elif CONFIG_IDF_TARGET_ESP32S2
-    {{&machine_adc_block_type}, ADC_UNIT_1, 13, -1, {0}},
-    {{&machine_adc_block_type}, ADC_UNIT_2, 13, -1, {0}},
-    #endif
+    {{&machine_adc_block_type}, ADC_UNIT_1, SOC_ADC_RTC_MAX_BITWIDTH, -1, {0}},
+    {{&machine_adc_block_type}, ADC_UNIT_2, SOC_ADC_RTC_MAX_BITWIDTH, -1, {0}},
 };
 
 static void mp_machine_adc_block_print(const mp_print_t *print, machine_adc_block_obj_t *self) {

diff --git a/ports/esp32/machine_bitstream.c b/ports/esp32/machine_bitstream.c
@@ -42,7 +42,7 @@
 // This is a translation of the cycle counter implementation in ports/stm32/machine_bitstream.c.
 static void IRAM_ATTR machine_bitstream_high_low_bitbang(mp_hal_pin_obj_t pin, uint32_t *timing_ns, const uint8_t *buf, size_t len) {
     uint32_t pin_mask, gpio_reg_set, gpio_reg_clear;
-    #if !CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6
+    #if SOC_GPIO_PIN_COUNT > 32
     if (pin >= 32) {
         pin_mask = 1 << (pin - 32);
         gpio_reg_set = GPIO_OUT1_W1TS_REG;

diff --git a/ports/esp32/machine_i2c.c b/ports/esp32/machine_i2c.c
@@ -49,10 +49,14 @@
 #endif
 #endif
 
-#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C6
-#define I2C_SCLK_FREQ XTAL_CLK_FREQ
-#elif CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2
-#define I2C_SCLK_FREQ APB_CLK_FREQ
+#if SOC_I2C_SUPPORT_APB
+#define I2C_SCLK_FREQ I2C_SCLK_APB // I2C source clock from APB, 80M
+#elif SOC_I2C_SUPPORT_XTAL
+#define I2C_SCLK_FREQ I2C_SCLK_XTAL // I2C source clock from XTAL, 40M
+#elif SOC_I2C_SUPPORT_RTC
+#define I2C_SCLK_FREQ I2C_SCLK_RTC // I2C source clock from 8M RTC, 8M
+#elif SOC_I2C_SUPPORT_REF_TICK
+#define I2C_SCLK_FREQ I2C_SCLK_REF_TICK // I2C source clock from REF_TICK, 1M
 #else
 #error "unsupported I2C for ESP32 SoC variant"
 #endif

diff --git a/ports/esp32/machine_pin.c b/ports/esp32/machine_pin.c
@@ -44,7 +44,7 @@
 #include "modesp32.h"
 #include "genhdr/pins.h"
 
-#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6
+#if SOC_USB_SERIAL_JTAG_SUPPORTED
 #include "soc/usb_serial_jtag_reg.h"
 #endif
 

diff --git a/ports/esp32/machine_pwm.c b/ports/esp32/machine_pwm.c
@@ -241,11 +241,12 @@ static void set_freq(machine_pwm_obj_t *self, unsigned int freq, ledc_timer_conf
         // Configure the new resolution and frequency
         timer->duty_resolution = res;
         timer->freq_hz = freq;
-        #if CONFIG_IDF_TARGET_ESP32C6
-        // TODO don't know if this is appropriate, compiler error suggested it
-        timer->clk_cfg = LEDC_USE_XTAL_CLK;
-        #else
+        #if SOC_LEDC_SUPPORT_PLL_DIV_CLOCK
+        timer->clk_cfg = LEDC_USE_PLL_DIV_CLOCK;
+        #elif SOC_LEDC_SUPPORT_APB_CLOCK
         timer->clk_cfg = LEDC_USE_APB_CLK;
+        #elif SOC_LEDC_SUPPORT_XTAL_CLOCK
+        timer->clk_cfg = LEDC_USE_XTAL_CLK;
         #endif
         #if SOC_LEDC_SUPPORT_REF_TICK
         if (freq < EMPIRIC_FREQ) {

diff --git a/ports/esp32/modmachine.c b/ports/esp32/modmachine.c
@@ -45,7 +45,7 @@
 #define MICROPY_PY_MACHINE_SDCARD_ENTRY
 #endif
 
-#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3
+#if SOC_TOUCH_SENSOR_SUPPORTED
 #define MICROPY_PY_MACHINE_TOUCH_PAD_ENTRY { MP_ROM_QSTR(MP_QSTR_TouchPad), MP_ROM_PTR(&machine_touchpad_type) },
 #else
 #define MICROPY_PY_MACHINE_TOUCH_PAD_ENTRY

diff --git a/ports/esp32/mpconfigport.h b/ports/esp32/mpconfigport.h
@@ -41,7 +41,7 @@
 
 // emitters
 #define MICROPY_PERSISTENT_CODE_LOAD        (1)
-#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6
+#if CONFIG_IDF_TARGET_ARCH_RISCV
 #define MICROPY_EMIT_RV32                   (1)
 #else
 #define MICROPY_EMIT_XTENSAWIN              (1)