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PR Description

Added SystemVerilog support (modules, packages) in check_guideline.py
Added automatic checks/fixes for typedef, localparam, and other rules
Updated workflow so check_guideline.py does not run on deleted files
Updated README section for check_guideline.py
Updated style rules documentation on GitHub

PR Type

  • Bug fix (change that fixes an issue)
  • New feature (change that adds new functionality)
  • Breaking change (has dependencies in other repos or will cause CI to fail)
  • Documentation

PR Checklist

  • I have followed the code style guidelines
  • I have performed a self-review of changes
  • I have compiled all hdl projects and libraries affected by this PR
  • I have tested in hardware affected projects, at least on relevant boards
  • I have commented my code, at least hard-to-understand parts
  • I have signed off all commits from this PR
  • [ x I have updated the documentation (wiki pages, ReadMe files, Copyright etc)
  • I have not introduced new Warnings/Critical Warnings on compilation
  • I have added new hdl testbenches or updated existing ones

Signed-off-by: Elena-Hadarau_adi <Elena.Hadarau@analog.com>
@hadarauelena hadarauelena force-pushed the upd_chk_guideline branch 4 times, most recently from d52061f to 9074b1a Compare September 11, 2025 12:35
@hadarauelena hadarauelena marked this pull request as draft September 18, 2025 11:22
Signed-off-by: Elena-Hadarau_adi <Elena.Hadarau@analog.com>
Added support for SystemVerilog modules and packages and
implemented the required rules.

Signed-off-by: Elena-Hadarau_adi <Elena.Hadarau@analog.com>
…line

Updated the workflow so that deleted files are not passed as parameters to
check_guideline.py

Signed-off-by: Elena-Hadarau_adi <Elena.Hadarau@analog.com>
@hadarauelena hadarauelena marked this pull request as ready for review September 24, 2025 07:19
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