[MIPS] Count timer interrupts correctly.

Signed-off-by: Chris Dearman <chris@mips.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
amtssp · Jun 26, 2007 · 8e15a0e · 8e15a0e
1 parent 2fae373
commit 8e15a0e
Showing 1 changed file with 1 addition and 1 deletion.
diff --git a/arch/mips/kernel/smtc.c b/arch/mips/kernel/smtc.c
@@ -822,7 +822,7 @@ void ipi_decode(struct smtc_ipi *pipi)
 	switch (type_copy) {
 	case SMTC_CLOCK_TICK:
 		irq_enter();
-		kstat_this_cpu.irqs[MIPS_CPU_IRQ_BASE + cp0_perfcount_irq]++;
+		kstat_this_cpu.irqs[MIPS_CPU_IRQ_BASE + cp0_compare_irq]++;
 		/* Invoke Clock "Interrupt" */
 		ipi_timer_latch[dest_copy] = 0;
 #ifdef CONFIG_SMTC_IDLE_HOOK_DEBUG