Skip to content

Commit

Permalink
MIPS: Relax instruction order check in msa-builtins.c.
Browse files Browse the repository at this point in the history
gcc/testsuite

	* gcc.target/mips/msa-builtins.c (msa_insert_d): Tweak expected output.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@243848 138bc75d-0d04-0410-961f-82ee72b054a4
  • Loading branch information
tomtab committed Dec 21, 2016
1 parent 85f7008 commit f14eeb9
Show file tree
Hide file tree
Showing 2 changed files with 5 additions and 1 deletion.
4 changes: 4 additions & 0 deletions gcc/testsuite/ChangeLog
Original file line number Diff line number Diff line change
@@ -1,3 +1,7 @@
2016-12-21 Toma Tabacu <toma.tabacu@imgtec.com>

* gcc.target/mips/msa-builtins.c (msa_insert_d): Tweak expected output.

2016-12-21 Janne Blomqvist <jb@gcc.gnu.org>

PR fortran/78867
Expand Down
2 changes: 1 addition & 1 deletion gcc/testsuite/gcc.target/mips/msa-builtins.c
Original file line number Diff line number Diff line change
Expand Up @@ -481,7 +481,7 @@
/* { dg-final { scan-assembler-times "msa_insert_h:.*insert\\.h.*msa_insert_h" 1 } } */
/* { dg-final { scan-assembler-times "msa_insert_w:.*insert\\.w.*msa_insert_w" 1 } } */
/* { dg-final { scan-assembler-times "msa_insert_d:.*insert\\.d.*msa_insert_d" 1 { target mips64 } } } */
/* { dg-final { scan-assembler-times "msa_insert_d:.*sra.*insert.w.*insert.w.*msa_insert_d" 1 { target {! mips64 } } } } */
/* { dg-final { scan-assembler "msa_insert_d:.*(sra.*insert.w.*insert.w|insert.w.*sra.*insert.w).*msa_insert_d" { target {! mips64 } } } } */
/* { dg-final { scan-assembler-times "msa_insve_b:.*insve\\.b.*msa_insve_b" 1 } } */
/* { dg-final { scan-assembler-times "msa_insve_h:.*insve\\.h.*msa_insve_h" 1 } } */
/* { dg-final { scan-assembler-times "msa_insve_w:.*insve\\.w.*msa_insve_w" 1 } } */
Expand Down

0 comments on commit f14eeb9

Please sign in to comment.