For more information and updates: http://alexforencich.com/wiki/en/verilog/lfsr/start
GitHub repository: https://github.com/alexforencich/verilog-lfsr
Fully parametrizable combinatorial parallel LFSR/CRC module. Implements an unrolled LFSR next state computation. Includes full cocotb testbenches.
Fully parametrizable combinatorial parallel LFSR/CRC module. Implements an unrolled LFSR next state computation.
Wrapper for lfsr module for standard CRC computation.
Wrapper for lfsr module for self-synchronizing descrambler.
Wrapper for lfsr module for standard PRBS check.
Wrapper for lfsr module for standard PRBS computation.
Wrapper for lfsr module for self-synchronizing scrambler.
lfsr.v : Parametrizable combinatorial LFSR/CRC module
lfsr_crc.v : Parametrizable CRC computation wrapper
lfsr_descramble.v : Parametrizable LFSR self-synchronizing descrambler
lfsr_prbs_check.v : Parametrizable PRBS checker wrapper
lfsr_prbs_gen.v : Parametrizable PRBS generator wrapper
lfsr_scramble.v : Parametrizable LFSR self-synchronizing scrambler
Running the included testbenches requires cocotb and Icarus Verilog. The testbenches can be run with pytest directly (requires cocotb-test), pytest via tox, or via cocotb makefiles.