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ajithkjohn123/QuantifierElimination
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Contents ----------- This folder contains details of experiments reported in the paper "A Layered Algorithm for Quantifier Elimination from Linear Modular Constraints", submitted to the journal FMSD. Benchmarks/: Contains the lindd benchmarks and vhdl benchmarks reported in the paper. VHDL_Designs/: VHDL designs, property files etc. used in table showing utility of QE algorithms in verification. Executables/: Executables used in the experiments. Experiments/: Logfiles and plotfiles generated in the experiments. Implementations/: Implementations of our executables used in the experiments.
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Replication pack for QE experiments
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