Open
Description
Currently on ESP32-S3, to debug the board, you have 3 options:
- print spam
- The board's built-in JTAG adapter. It comes with the downside that you can't use the usb com port for anything other than serial + jtag. It effectively becomes a esp32-c3 in that mode. CircuitPython doesn't use this mode but instead provides the CIRCUITPY drive.
- The pins 39-42. This requires the espfuse
STRAP_JTAG_SEL
to be burned. The downside to this approach, is that you actually have to use an efuse, fumble with gpio3, and restrict gpio pins 39-42 for jtag.
My idea is that we make number 2, a default on DEBUG=1
builds.
So that the mode switch (serial + jtag -> serial + circuitpy drive) does not occur, and usb_cdc
is instead disabled.