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Merge pull request #9661 from sanhu88/sunton_esp32_8048S050
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add Port of Sunton esp32 8048S050
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tannewt authored Sep 25, 2024
2 parents cd5c9d2 + b7f8a5a commit ca99b41
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82 changes: 82 additions & 0 deletions ports/espressif/boards/sunton_esp32_8048S050/board.c
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// This file is part of the CircuitPython project: https://circuitpython.org
//
// SPDX-FileCopyrightText: Copyright (c) 2020 Scott Shawcroft for Adafruit Industries
//
// SPDX-License-Identifier: MIT

#include "supervisor/board.h"
#include "mpconfigboard.h"
#include "shared-bindings/board/__init__.h"
#include "shared-bindings/dotclockframebuffer/DotClockFramebuffer.h"
#include "shared-bindings/dotclockframebuffer/__init__.h"
#include "shared-bindings/framebufferio/FramebufferDisplay.h"
#include "shared-bindings/microcontroller/Pin.h"
#include "shared-module/displayio/__init__.h"

static const mcu_pin_obj_t *blue_pins[] = {
&pin_GPIO8,
&pin_GPIO3,
&pin_GPIO46,
&pin_GPIO9,
&pin_GPIO1
};
static const mcu_pin_obj_t *green_pins[] = {
&pin_GPIO5,
&pin_GPIO6,
&pin_GPIO7,
&pin_GPIO15,
&pin_GPIO16,
&pin_GPIO4
};
static const mcu_pin_obj_t *red_pins[] = {
&pin_GPIO45,
&pin_GPIO48,
&pin_GPIO47,
&pin_GPIO21,
&pin_GPIO14
};

static void display_init(void) {

// Turn on backlight
gpio_set_direction(2, GPIO_MODE_DEF_OUTPUT);
gpio_set_level(2, true);
common_hal_never_reset_pin(&pin_GPIO2);

dotclockframebuffer_framebuffer_obj_t *framebuffer = &allocate_display_bus_or_raise()->dotclock;
framebuffer->base.type = &dotclockframebuffer_framebuffer_type;

common_hal_dotclockframebuffer_framebuffer_construct(
framebuffer,
&pin_GPIO40, // de
&pin_GPIO41, // vsync
&pin_GPIO39, // hsync
&pin_GPIO42, // pclk
red_pins, MP_ARRAY_SIZE(red_pins),
green_pins, MP_ARRAY_SIZE(green_pins),
blue_pins, MP_ARRAY_SIZE(blue_pins),
12500000, // Frequency
800, // width
480, // height
4, 8, 8, true, // horiz: pulse, back porch, front porch, idle low
4, 8, 8, true, // vert: pulse, back porch, front porch, idle low
false, // DE idle high
false, // pclk active high
false, // pclk idle high
0 // overscan left
);

framebufferio_framebufferdisplay_obj_t *display = &allocate_display_or_raise()->framebuffer_display;
display->base.type = &framebufferio_framebufferdisplay_type;
common_hal_framebufferio_framebufferdisplay_construct(
display,
framebuffer,
0, // rotation
true // auto-refresh
);
}

void board_init(void) {
display_init();
}
// Use the MP_WEAK supervisor/shared/board.c versions of routines not defined here.
23 changes: 23 additions & 0 deletions ports/espressif/boards/sunton_esp32_8048S050/mpconfigboard.h
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// This file is part of the CircuitPython project: https://circuitpython.org
//
// SPDX-FileCopyrightText: Copyright (c) 2019 Scott Shawcroft for Adafruit Industries
//
// SPDX-License-Identifier: MIT

#pragma once

// Micropython setup

#define MICROPY_HW_BOARD_NAME "Sunton-ESP32-8048S050"
#define MICROPY_HW_MCU_NAME "ESP32S3"

#define DEFAULT_I2C_BUS_SDA (&pin_GPIO19)
#define DEFAULT_I2C_BUS_SCL (&pin_GPIO20)

#define DEFAULT_SPI_BUS_MOSI (&pin_GPIO11)
#define DEFAULT_SPI_BUS_SCK (&pin_GPIO12)
#define DEFAULT_SPI_BUS_MISO (&pin_GPIO13)

// UART pins attached to the USB-serial converter chip
#define CIRCUITPY_CONSOLE_UART_TX (&pin_GPIO43)
#define CIRCUITPY_CONSOLE_UART_RX (&pin_GPIO44)
19 changes: 19 additions & 0 deletions ports/espressif/boards/sunton_esp32_8048S050/mpconfigboard.mk
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CIRCUITPY_CREATOR_ID = 0x19991000
CIRCUITPY_CREATION_ID = 0x00AA0050

# This board doesn't have USB by default, it
# instead uses a CH340C USB-to-Serial chip
CIRCUITPY_USB_DEVICE = 0
CIRCUITPY_ESP_USB_SERIAL_JTAG = 0

IDF_TARGET = esp32s3

CIRCUITPY_ESP_FLASH_MODE = qio
CIRCUITPY_ESP_FLASH_FREQ = 80m
CIRCUITPY_ESP_FLASH_SIZE = 16MB

CIRCUITPY_ESP_PSRAM_SIZE = 8MB
CIRCUITPY_ESP_PSRAM_MODE = opi
CIRCUITPY_ESP_PSRAM_FREQ = 80m

CIRCUITPY_DOTCLOCKFRAMEBUFFER = 1
136 changes: 136 additions & 0 deletions ports/espressif/boards/sunton_esp32_8048S050/pins.c
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// This file is part of the CircuitPython project: https://circuitpython.org
//
// SPDX-FileCopyrightText: Copyright (c) 2020 Scott Shawcroft for Adafruit Industries
//
// SPDX-License-Identifier: MIT

#include "py/objtuple.h"
#include "shared-bindings/board/__init__.h"
#include "shared-module/displayio/__init__.h"

static const mp_rom_obj_tuple_t tft_r_pins = {
{&mp_type_tuple},
5,
{
MP_ROM_PTR(&pin_GPIO45),
MP_ROM_PTR(&pin_GPIO48),
MP_ROM_PTR(&pin_GPIO47),
MP_ROM_PTR(&pin_GPIO21),
MP_ROM_PTR(&pin_GPIO14),
}
};

static const mp_rom_obj_tuple_t tft_g_pins = {
{&mp_type_tuple},
6,
{
MP_ROM_PTR(&pin_GPIO5),
MP_ROM_PTR(&pin_GPIO6),
MP_ROM_PTR(&pin_GPIO7),
MP_ROM_PTR(&pin_GPIO15),
MP_ROM_PTR(&pin_GPIO16),
MP_ROM_PTR(&pin_GPIO4),
}
};

static const mp_rom_obj_tuple_t tft_b_pins = {
{&mp_type_tuple},
5,
{
MP_ROM_PTR(&pin_GPIO8),
MP_ROM_PTR(&pin_GPIO3),
MP_ROM_PTR(&pin_GPIO46),
MP_ROM_PTR(&pin_GPIO9),
MP_ROM_PTR(&pin_GPIO1),
}
};

static const mp_rom_map_elem_t tft_pins_table[] = {
{ MP_ROM_QSTR(MP_QSTR_de), MP_ROM_PTR(&pin_GPIO40) },
{ MP_ROM_QSTR(MP_QSTR_vsync), MP_ROM_PTR(&pin_GPIO41) },
{ MP_ROM_QSTR(MP_QSTR_hsync), MP_ROM_PTR(&pin_GPIO39) },
{ MP_ROM_QSTR(MP_QSTR_dclk), MP_ROM_PTR(&pin_GPIO42) },
{ MP_ROM_QSTR(MP_QSTR_red), MP_ROM_PTR(&tft_r_pins) },
{ MP_ROM_QSTR(MP_QSTR_green), MP_ROM_PTR(&tft_g_pins) },
{ MP_ROM_QSTR(MP_QSTR_blue), MP_ROM_PTR(&tft_b_pins) },
};
MP_DEFINE_CONST_DICT(tft_pins_dict, tft_pins_table);

static const mp_rom_map_elem_t timings_table[] = {
{ MP_ROM_QSTR(MP_QSTR_frequency), MP_ROM_INT(12500000) },
{ MP_ROM_QSTR(MP_QSTR_width), MP_ROM_INT(800) },
{ MP_ROM_QSTR(MP_QSTR_height), MP_ROM_INT(480) },
{ MP_ROM_QSTR(MP_QSTR_hsync_pulse_width), MP_ROM_INT(4) },
{ MP_ROM_QSTR(MP_QSTR_hsync_back_porch), MP_ROM_INT(8) },
{ MP_ROM_QSTR(MP_QSTR_hsync_front_porch), MP_ROM_INT(8) },
{ MP_ROM_QSTR(MP_QSTR_hsync_idle_low), MP_ROM_TRUE },
{ MP_ROM_QSTR(MP_QSTR_vsync_pulse_width), MP_ROM_INT(4) },
{ MP_ROM_QSTR(MP_QSTR_vsync_back_porch), MP_ROM_INT(8) },
{ MP_ROM_QSTR(MP_QSTR_vsync_front_porch), MP_ROM_INT(8) },
{ MP_ROM_QSTR(MP_QSTR_vsync_idle_low), MP_ROM_TRUE },
{ MP_ROM_QSTR(MP_QSTR_de_idle_high), MP_ROM_FALSE },
{ MP_ROM_QSTR(MP_QSTR_pclk_active_high), MP_ROM_FALSE },
{ MP_ROM_QSTR(MP_QSTR_pclk_idle_high), MP_ROM_FALSE },

};
MP_DEFINE_CONST_DICT(timings_dict, timings_table);

static const mp_rom_map_elem_t board_module_globals_table[] = {
CIRCUITPYTHON_BOARD_DICT_STANDARD_ITEMS

// Display constructs
{ MP_ROM_QSTR(MP_QSTR_TFT_PINS), MP_ROM_PTR(&tft_pins_dict) },
{ MP_ROM_QSTR(MP_QSTR_TFT_TIMINGS), MP_ROM_PTR(&timings_dict) },
{ MP_ROM_QSTR(MP_QSTR_TFT_BACKLIGHT), MP_ROM_PTR(&pin_GPIO2) },

// User buttons
{ MP_ROM_QSTR(MP_QSTR_IO0), MP_ROM_PTR(&pin_GPIO0) },
{ MP_ROM_QSTR(MP_QSTR_BOOT0), MP_ROM_PTR(&pin_GPIO0) },
{ MP_ROM_QSTR(MP_QSTR_BUTTON), MP_ROM_PTR(&pin_GPIO0) },

// User accessible GPIO
{ MP_ROM_QSTR(MP_QSTR_IO19), MP_ROM_PTR(&pin_GPIO19) }, // P2, External SPI plug
{ MP_ROM_QSTR(MP_QSTR_IO11), MP_ROM_PTR(&pin_GPIO11) },
{ MP_ROM_QSTR(MP_QSTR_IO12), MP_ROM_PTR(&pin_GPIO12) },
{ MP_ROM_QSTR(MP_QSTR_IO13), MP_ROM_PTR(&pin_GPIO13) },

{ MP_ROM_QSTR(MP_QSTR_IO20), MP_ROM_PTR(&pin_GPIO20) }, // P3 has 19&20 for I2C bus, plus 17&18
{ MP_ROM_QSTR(MP_QSTR_IO17), MP_ROM_PTR(&pin_GPIO17) }, // P4 & P5 are both 17,18,3.3v,G
{ MP_ROM_QSTR(MP_QSTR_IO18), MP_ROM_PTR(&pin_GPIO18) },

// UART pins
{ MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_GPIO43) },
{ MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_GPIO44) },

// I2C
{ MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_GPIO19) },
{ MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_GPIO20) },

// SPI
{ MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_GPIO11) },
{ MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_GPIO12) },
{ MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_GPIO13) },

// i2s amplifier
{ MP_ROM_QSTR(MP_QSTR_I2S_BIT_CLOCK), MP_ROM_PTR(&pin_GPIO0) },
{ MP_ROM_QSTR(MP_QSTR_I2S_WORD_SELECT), MP_ROM_PTR(&pin_GPIO18) },
{ MP_ROM_QSTR(MP_QSTR_I2S_DATA), MP_ROM_PTR(&pin_GPIO17) },

// Touch (GT911 I2C, XPT2046 SPI)
// There are two versions of this tablet, one with capacitive touch
// one with resistive. They use their respective bus as defined,
// with GPIO38 being reset on capacitive and cs on resistive.
{ MP_ROM_QSTR(MP_QSTR_TOUCH_RESET), MP_ROM_PTR(&pin_GPIO38) },
{ MP_ROM_QSTR(MP_QSTR_TOUCH_CS), MP_ROM_PTR(&pin_GPIO38) },
{ MP_ROM_QSTR(MP_QSTR_TOUCH_INT), MP_ROM_PTR(&pin_GPIO18) },

// SD Slot (SPI)
{ MP_ROM_QSTR(MP_QSTR_SD_CS), MP_ROM_PTR(&pin_GPIO10) },

// Objects
{ MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) },
{ MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) },
{ MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) },
{ MP_ROM_QSTR(MP_QSTR_DISPLAY), MP_ROM_PTR(&displays[0].display)},
};
MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table);
15 changes: 15 additions & 0 deletions ports/espressif/boards/sunton_esp32_8048S050/sdkconfig
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#
# Espressif IoT Development Framework Configuration
#
#
# Component config
#
#
# LWIP
#
CONFIG_LWIP_LOCAL_HOSTNAME="sunton-esp32-8048S050"
# end of LWIP

# end of Component config

# end of Espressif IoT Development Framework Configuration

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