This repository contains all lab reports and simulation files for CSE231L: Digital Logic Design Lab, completed in Summer 2024 at North South University.
Dr. Khaleda Ali (KdA1)
Faculty, Department of Electrical and Computer Engineering
North South University
Each lab is organized into its own folder and includes the following components:
- Objective
- Theory
- Apparatus List
- Circuit Diagram
- Data Tables
- Question and Answer Section
- Discussion
- LogiSim Simulation Screenshot
- LogiSim
| Lab No. | Title | Report Link |
|---|---|---|
| Lab 01 | Digital Logic Gates and Boolean Functions | View Report |
| Lab 02 | Universal Gates | View Report |
| Lab 03 | Combinational Logic Design | Link will be added soon |
| Lab 04 | Combinational Logic Design | Link will be added soon |
| Lab 05 | Binary Arithmetic | Link will be added soon |
| Lab 06 | BCD to Seven Segment Decoder | Link will be added soon |
| Lab 07 | Introduction to Multiplexers & 3 to 8 Line Decoder | Link will be added soon |
| Lab 08 | Introduction to Flip-flop and Registers | Link will be added soon |
| Lab 09 | Synchronous Sequential Circuits | Link will be added soon |
This repository is intended to demonstrate the proper structure and formatting of Digital Logic Design Lab reports. It serves as a reference to help students understand how to document and present their lab work effectively.
These reports are shared strictly for educational purposes—to provide direction on how lab reports can be written clearly and professionally.
We do not endorse plagiarism, nor do we encourage copying any part of this work.
Students are expected to conduct their own research, understand the underlying concepts, and complete lab tasks independently in order to truly benefit from the learning experience.
This project is licensed under the MIT License.