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1. DTMF_CHIP DTMF_CHIP Public

   used for PAR practice

   Verilog 1 1

2. risc-v-chisel-project risc-v-chisel-project Public

   Forked from ThalesGroup/risc-v-chisel-project

   This is a starter template for your custom RISC-V project. It will allow you to leverage the Chisel HDL and RocketChip SoC generator to produce a RISC-V SoC with MMIO-mapped peripherals, DMA, and c…

   Scala

3. bootrom_rocket bootrom_rocket Public

   used for rocket TLROM

4. riscv-testprogram riscv-testprogram Public

   used for riscv soc test

   C

5. project_try project_try Public

   Python

6. ZhaoHaowenn.github.io ZhaoHaowenn.github.io Public

   JavaScript