Fix race condition when tracing is enabled

LICENSES/MIT

@@ -0,0 +1,30 @@
+Valid-License-Identifier: MIT
+SPDX-URL: https://spdx.org/licenses/MIT.html
+Usage-Guide:
+  To use the MIT License put the following SPDX tag/value pair into a
+  comment according to the placement guidelines in the licensing rules
+  documentation:
+    SPDX-License-Identifier: MIT
+License-Text:
+
+MIT License
+
+Copyright (c) <year> <copyright holders>
+
+Permission is hereby granted, free of charge, to any person obtaining a
+copy of this software and associated documentation files (the "Software"),
+to deal in the Software without restriction, including without limitation
+the rights to use, copy, modify, merge, publish, distribute, sublicense,
+and/or sell copies of the Software, and to permit persons to whom the
+Software is furnished to do so, subject to the following conditions:
+
+The above copyright notice and this permission notice shall be included in
+all copies or substantial portions of the Software.
+
+THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+DEALINGS IN THE SOFTWARE.

README.txt

@@ -1,149 +1,109 @@
 embeddedsw.git - repo for standalone software
 
-All software is version less and divided into three directories
+The standalone software is divided into following directories:
 	- lib
-		contains bsp, zynq fsbl and software services like xilisf
+		contains bsp, software apps and software services
 	- license.txt
 		contains information about the various licenses and copyrights
-	- XilinxProcessorIPLib
+	- doc/ChangeLog
+		Contains change log information for releases
+	- XilinxProcessorIPLib/drivers
 		contains all drivers
 	- ThirdParty
 		software from third party like light weight IP stack
-	- mcap
+	- mcap/linux
 		software for using MCAP interface on Ultra Scale boards to
 		program 2nd level bitstream
 
-Every driver/lib/apps/services has these sub-directories
-
+Every driver, sw_apps and sw_services has one or more of these sub-directories:
 1. data		- contains tcl, mdd, testapp tcl or header files used in SDK
-2. doc		- documentation of source code in form of pdf or html
+2. doc		- documentation of source code in form of pdf or html 
 3. examples	- illustrating different use cases of driver
 4. src		- driver interface code implementing functionality of IP
 
-
 <repo>
-|-XilinxProcessorIPLib
-|	|- drivers
-|		|- uartps
+|-ThirdParty
+|	|- bsp
+|		|- freertos1-_xilinx
 |			|- data
 |			|- src
-|			|- doc
-|			|- examples
+|				|- License
+|				|- Source
+|	|- sw_services
+|		|- libmetal
+|		|- lwip141
+|		|- lwip202
+|		|- openamp
 |
+|-XilinxProcessorIPLib
+|	|- drivers
+|		|- avbuf
+|		|- ...
+|		|- ...
+|		|- zdma
+|
+|-doc
 |-lib
 |	|- bsp
 |		|- standalone
 |			|- data
+|			|- doc
 |			|- src
-|                               |- arm
-|                                     |- common
-|				      |- cortexa9
-|				      |- cortexa53
-|				      |- cortexr5
+|				|- arm
+|					|- common
+|					|- cortexa53
+|					|- cortexa9
+|					|- cortexr5
+|           	|- common
 |				|- microblaze
-|				|- common
 |				|- profile
-|			|- doc
-|		|- xilkernel
-|			|- data
-|			|- doc
-|			|- src
 |	|- sw_apps
-|		|- zynq_fsbl [described below]
-		|- zynqmp_fsbl [described below]
-		|- zynqmp_pmufw [described below]
+|		|- ddr_self_refresh
+|		|- ....
+|		|- ....
+|		|- ....
+|		|- ....
+|		|- zynqmp_fsbl [described below]
+|		|- zynqmp_pmufw [described below]
 |	|- sw_services
 |		|- xilffs
-|		|- xilskey
-|		|- xilmfs
-|		|- xilrsa
 |		|- xilflash
+|		|- xilfpga
 |		|- xilisf
+|		|- xilmfs
+|		|- xilpm
+|		|- xilrsa
 |		|- xilsecure
+|		|- xilskey
 |
 |	Note - All these are libraries and utilize drivers
 |
-|-ThirdParty
-|	|- sw_services
-|        	|- lwip140
-|
 |-mcap
 |	|-linux
 
 
 Building FSBL from git:
-
+==============================
 FSBL(zynq_fsbl/zynqmp_fsbl) has 3 directories.
 	1. data - It contains files for SDK
 	2. src  - It contains the FSBL source files
 	3. misc - It contains miscellaneous files required to
 		  compile FSBL.
-		  For zynq (zynq_fsbl), builds for zc702, zc706, zed and
-		  microzed boards are supported.
-		  For zynqmp (zynqmp_fsbl), builds for zcu102,zcu102-es2 board are
-		  supported.
+		  For zynq (zynq_fsbl), builds for zc702, zc706, zed are supported.
 		  It also contains the ps7_init_gpl.[c/h] with gpl
 		  header in respective board directories.
+		  For zynqmp (zynqmp_fsbl), builds for zcu102,zcu102-es2 board are
+		  supported.
+
 
 
 How to compile FSBL:
-	Zynq
-	1.Go to the Fsbl src directory "lib/sw_apps/zynq_fsbl/src/"
-	2. make "BOARD=<>" "CC=<>"
-		a. Values for BOARD  are zc702, zc706, zed, microzed
-		b. Value for CC is arm-xilinx-eabi-gcc. Default value is also same.
-	3.Give "make" to compile the fsbl with BSP. By default it is
-	  built for zc702 board with arm-xilinx-eabi-gcc compiler
-	4.Below are the examples for compiling for different options
-		a. To generate Fsbl for zc706 board
-			i.make "BOARD=zc706"
-		b.To generate Fsbl for zc702 board with debug enable
-		  and RSA support
-			i.make "BOARD=zc702" "CFLAGS=-DFSBL_DEBUG_INFO -DRSA_SUPPORT"
-		c.To generate Fsbl for zc706 board and compile with arm-xilinx-eabi-gcc
-		  with MMC support
-			i.make "BOARD=zc706" "CC=arm-xilinx-eabi-gcc" "CFLAGS=-DMMC_SUPPORT"
+	Zynq:
+	Please refer to the steps in Readme.txt which is at lib/sw_apps/zynq_fsbl/misc/ directory
 
 	ZynqMP
-	1.Go to the Fsbl src directory "lib/sw_apps/zynqmp_fsbl/src/"
-	2.If executables and other artifacts from previous FSBL build with other
-	  configuration (different processor/state) are present, run
-	  make clean to delete them.
-	2.Give build command in the following manner.
-		a. make "BOARD=<>" "PROC=<>" "A53_STATE=<>"
-		a. Value for BOARD can be zcu102 or zcu102-es2. (Default is zcu102)
-		b. Value for PROC can be a53 or r5. (Default is a53)
-		c. Value for A53_STATE can be 64 or 32. (Default: 64)
-			A53_STATE is only to be given when processor is a53.
-	3.Give "make" to compile the fsbl with BSP. By default it is
-	  built for zcu102 board.
-	4.Below are the examples for compiling for different options
-		a. To generate A53 64 bit Fsbl for zcu102 board
-			i.make "BOARD=zcu102" "PROC=a53" "A53_STATE=64"
-		b.To generate R5 Fsbl for zcu102 board with debug enable
-			i.make "BOARD=zcu102" "PROC=r5" "CFLAGS+=-DFSBL_DEBUG_INFO"
-		c.To generate A53 32 bit Fsbl for zcu102 board.
-			i.make "BOARD=zcu102" "PROC=a53" "A53_STATE=32"
-		d. To generate A53 64 bit Fsbl for zcu102-es2 board
-			i.make "BOARD=zcu102-es2" "PROC=a53" "A53_STATE=64"
-		e.To generate R5 Fsbl for zcu102-es2 board with debug enable
-			i.make "BOARD=zcu102-es2" "PROC=r5" "CFLAGS+=-DFSBL_DEBUG_INFO"
-		f.To generate A53 32 bit Fsbl for zcu102-es2 board.
-			i.make "BOARD=zcu102-es2" "PROC=a53" "A53_STATE=32"
+	Please refer to the steps in Readme.txt which is at lib/sw_apps/zynqmp_fsbl/misc/ directory
 
 Building PMUFW from git:
-
-PMUFW(zynqmp_pmufw) has 3 directories.
-	1. data - It contains files for SDK
-	2. src  - It contains the PMUFW source files
-	3. misc - It contains miscellaneous files required to
-		  compile PMUFW.
-
-
-How to compile PMUFW:
-
-	ZynqMP
-	1.Go to the PMUFW src directory "lib/sw_apps/zynqmp_pmufw/src/"
-	2.If executables and other artifacts from previous PMUFW build are present, run
-	  make clean to delete them.
-	3.Give "make" to compile the PMUFW with BSP.
+==============================
+Please refer to the steps in Readme.txt which is at lib/sw_apps/zynqmp_pmufw/misc/ directory

ThirdParty/bsp/freertos10_xilinx/data/freertos10_xilinx.mld

@@ -0,0 +1,117 @@
+#
+# Copyright (C) 2015 - 2020 Xilinx, Inc.
+#
+# This file is part of the FreeRTOS port.
+#
+# Permission is hereby granted, free of charge, to any person obtaining a copy of
+# this software and associated documentation files (the "Software"), to deal in
+# the Software without restriction, including without limitation the rights to
+# use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+# the Software, and to permit persons to whom the Software is furnished to do so,
+# subject to the following conditions:
+#
+# The above copyright notice and this permission notice shall be included in all
+# copies or substantial portions of the Software.
+#
+# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+# FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+# COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+# IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+# CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+#
+# http://www.FreeRTOS.org
+# http://aws.amazon.com/freertos
+#
+# 1 tab == 4 spaces!
+#
+
+OPTION psf_version = 2.1.0 ;
+BEGIN OS freertos10_xilinx
+
+OPTION DRC = FreeRTOS_drc ;
+OPTION supported_peripherals =  (microblaze ps7_cortexa9 psu_cortexr5 psv_cortexr5 psu_cortexa53 psv_cortexa72);
+OPTION COPYFILES = all;
+OPTION NAME = freertos10_xilinx;
+OPTION VERSION = 1.6;
+OPTION DEPENDS = (standalone_v7_2);
+OPTION APP_LINKER_FLAGS = "-Wl,--start-group,-lxil,-lfreertos,-lgcc,-lc,--end-group";
+OPTION DESC = "This Xilinx FreeRTOS port is based on FreeRTOS kernel version 10.3.0";
+
+# STDIN/STDOUT
+PARAM name = stdin, desc = "stdin peripheral", type = peripheral_instance, requires_interface = stdin, default=none, range = (ps7_uart, psu_uart, psv_sbsauart, ps7_coresight_comp, psu_coresight_0, psv_coresight_0, psv_pmc_ppu1_mdm, axi_uartlite, axi_uart16550, mdm, iomodule);
+PARAM name = stdout, desc = "stdout peripheral", type = peripheral_instance, requires_interface = stdout, default=none, range = (ps7_uart, psu_uart, psv_sbsauart, ps7_coresight_comp, psu_coresight_0, psv_coresight_0, psv_pmc_ppu1_mdm, axi_uartlite, axi_uart16550, mdm, iomodule);
+PARAM name = clocking, type = bool, default = false, desc = "Enable clocking support", permit = user;
+
+
+BEGIN CATEGORY kernel_behavior
+	PARAM name = kernel_behavior, type = bool, default = true, desc = "Parameters relating to the kernel behavior", permit = none;
+	PARAM name = max_api_call_interrupt_priority, type = int, default = 18, desc = "The maximum interrupt priority from which interrupt safe FreeRTOS API calls can be made.";
+	PARAM name = use_preemption, type = bool, default = true, desc = "Set to true to use the preemptive scheduler, or false to use the cooperative scheduler.";
+	PARAM name = tick_rate, type = int, default = 100, desc = "Number of RTOS ticks per sec";
+	PARAM name = idle_yield, type = bool, default = true, desc = "Set to true if the Idle task should yield if another idle priority task is able to run, or false if the idle task should always use its entire time slice unless it is preempted.";
+	PARAM name = max_priorities, type = int, default = 8, desc = "The number of task priorities that will be available.  Priorities can be assigned from zero to (max_priorities - 1)";
+	PARAM name = minimal_stack_size, type = int, default = 200, desc = "The size of the stack allocated to the Idle task. Also used by standard demo and test tasks found in the main FreeRTOS download.";
+	PARAM name = total_heap_size, type = int, default = 65536, desc = "Sets the amount of RAM reserved for use by FreeRTOS - used when tasks, queues, semaphores and event groups are created.";
+	PARAM name = max_task_name_len, type = int, default = 10, desc = "The maximum number of characters that can be in the name of a task.";
+	PARAM name = use_timeslicing, type = bool, default = true, desc = "When true equal priority ready tasks will share CPU time with a context switch on each tick interrupt.";
+	PARAM name = use_port_optimized_task_selection, type = bool, default = true, desc ="When true task selection will be faster at the cost of limiting the maximum number of unique priorities to 32.";
+END CATEGORY
+
+BEGIN CATEGORY kernel_features
+	PARAM name = kernel_features, type = bool, default = true, desc = "Include or exclude kernel features", permit = none;
+	PARAM name = stream_buffer, type = bool, default = false, desc = "Set to true to include stream buffer functionality, or false to exclude stream buffer functionality.";
+	PARAM name = message_buffer, type = bool, default = false, desc = "Set to true to include message buffer functionality, or false to exclude message buffer functionality.";
+	PARAM name = support_static_allocation, type = bool, default = false, desc = "Set to true to allocate memory statically, or false to allocate memory dynamically.";
+	PARAM name = use_freertos_asserts, type = bool, default = true, desc = "Defines configASSERT() to assist development and debugging.  The application can override the default implementation of vApplicationAssert( char *pcFile, uint32_t ulLine )";
+	PARAM name = use_mutexes, type = bool, default = true, desc = "Set to true to include mutex functionality, or false to exclude mutex functionality.";
+        PARAM name = use_getmutex_holder, type = bool, default = true, desc = "Set to true to use mutex xSemaphoreGetMutexHolder API, or false to exclude it.";
+	PARAM name = use_recursive_mutexes, type = bool, default = true, desc = "Set to true to include recursive mutex functionality, or false to exclude recursive mutex functionality.";
+	PARAM name = use_counting_semaphores, type = bool, default = true, desc = "Set to true to include counting semaphore functionality, or false to exclude recursive mutex functionality.";
+	PARAM name = queue_registry_size, type = int, default = 10, desc = "The maximum number of queues that can be registered at any one time. Only registered queues can be viewed in the Eclipse/GDB kernel aware debugger plug-in.";
+	PARAM name = use_trace_facility, type = bool, default = true, desc = "Set to true to include the legacy trace functionality, and a few other features.  traceMACROS are the preferred method of tracing now.";
+	PARAM name = use_newlib_reent, type = bool, default = false, desc = "When true each task will have its own Newlib reent structure.";
+	PARAM name = use_queue_sets, type = bool, default = true, desc = "Set to true to include queue set functionality.";
+	PARAM name = use_task_notifications, type = bool, default = true, desc = "Set to true to include direct to task notification functionality.";
+	PARAM name = check_for_stack_overflow, type = int, default = 2, desc = "Set to 0 for no overflow checking.  Set to 1 to include basic run time task stack checking.  Set to 2 to include more comprehensive run time task stack checking.";
+	PARAM name = use_stats_formatting_functions, type = bool, default = true, desc = "Set to 1 to include the vTaskList() and vTaskGetRunTimeStats() functions, which format run-time data into human readable text.";
+	PARAM name = num_thread_local_storage_pointers, type = int, default = 0, desc ="Sets the number of pointers each task has to store thread local values.";
+        PARAM name = use_task_fpu_support, type = int, default = 1, desc ="Set to 1 to create tasks without FPU context, set to 2 to have tasks with FPU context by default.";
+        PARAM name = generate_runtime_stats, type = int, default = 0, desc ="Set to 1 generate runtime stats for tasks.";
+END CATEGORY
+
+BEGIN CATEGORY hook_functions
+	PARAM name = hook_functions, type = bool, default = true, desc = "Include or exclude application defined hook (callback) functions.  Callback functions must be defined by the application that is using FreeRTOS", permit = none;
+	PARAM name = use_idle_hook, type = bool, default = false, desc = "Set to true for the kernel to call vApplicationIdleHook() on each iteration of the idle task.  The application must provide an implementation of vApplicationIdleHook().";
+	PARAM name = use_tick_hook, type = bool, default = false, desc = "Set to true for the kernel to call vApplicationTickHook() during each tick interrupt.  The application must provide an implementation of vApplicationTickHook().";
+	PARAM name = use_malloc_failed_hook, type = bool, default = true, desc = "Only used if a FreeRTOS memory manager (heap_n.c) is included in the project.  Set to true for the kernel to call vApplicationMallocFailedHookHook() if there is insufficient FreeRTOS heap available for a task, queue or semaphore to be created.  The application can override the default implementation of vApplicationMallocFailedHook().";
+        PARAM name = use_daemon_task_startup_hook, type = bool, default = false, desc = "Set true for kernel to call vApplicationDaemonTaskStartupHook on first iteration of RTOS daemon task. The application must provide an implementation of vApplicationDaemonTaskStartupHook()."
+END CATEGORY
+
+BEGIN CATEGORY software_timers
+	PARAM name = software_timers, type = bool, default = true, desc = "Options relating to the software timers functionality", permit = user;
+	PARAM name = use_timers, type = bool, default = true, desc = "Set to true to include software timer functionality, or false to exclude software timer functionality";
+	PARAM name = timer_task_priority, type = string, default = "(configMAX_PRIORITIES - 1)", desc = "The priority at which the software timer service/daemon task will execute.";
+	PARAM name = timer_command_queue_length, type = int, default = 10, desc = "The number of commands the timer command queue can hold at any one time.";
+	PARAM name = timer_task_stack_depth, type = string, default = "(configMINIMAL_STACK_SIZE), desc = "The size of the stack allocated to the timer service/daemon task.";
+END CATEGORY
+
+BEGIN CATEGORY tick_setup
+	PARAM name = tick_setup, type = bool, default = true, desc = "Configuration for enabling tick timer", permit = user;
+	PARAM name = PSU_TTC0_Select, type = bool, default = true, desc = "psu_cortexr5 only: Set it to true to use TTC0 for tick interrupt generation";
+	PARAM name = PSU_TTC0_Select_Cntr, type = int, default = 0, desc = "psu_cortexr5 only: Selects the TTC0 counter to be used for tick generation. Allowed range is 0-2";
+	PARAM name = PSU_TTC1_Select, type = bool, default = false, desc = "psu_cortexr5 only: Set it to true to use TTC1 for tick interrupt generation";
+	PARAM name = PSU_TTC1_Select_Cntr, type = int, default = 0, desc = "psu_cortexr5 only: Selects the TTC1 counter to be used for tick generation. Allowed range is 0-2";
+	PARAM name = PSU_TTC2_Select, type = bool, default = false, desc = "psu_cortexr5 only: Set it to true to use TTC2 for tick interrupt generation";
+	PARAM name = PSU_TTC2_Select_Cntr, type = int, default = 0, desc = "psu_cortexr5 only: Selects the TTC2 counter to be used for tick generation. Allowed range is 0-2";
+	PARAM name = PSU_TTC3_Select, type = bool, default = false, desc = "psu_cortexr5 only: Set it to true to use TTC3 for tick interrupt generation";
+	PARAM name = PSU_TTC3_Select_Cntr, type = int, default = 0, desc = "psu_cortexr5 only: Selects the TTC3 counter to be used for tick generation. Allowed range is 0-2";
+END CATEGORY
+
+BEGIN CATEGORY enable_stm_event_trace
+	PARAM name = enable_stm_event_trace, type = bool, default = false, desc = "Enable event tracing through System Trace Macrocell available on Zynq MPSoC. This is supported only for Cortex A53 and R5 processors", permit = user;
+	PARAM name = enable_timer_tick_trace, type = bool, default = false, desc = "Enable tracing of timer tick events", permit = user;
+	PARAM name = stm_channel, type = int, default = 0, desc = "STM channel to use for trace. Valid channels are 0-65535";
+END CATEGORY
+
+END OS