Xilinx · xilinxgitops · Mar 28, 2025 · Mar 31, 2025 · Mar 31, 2025 · Mar 31, 2025
diff --git a/catalog/2025.2/aldec/activehdl/app.xml b/catalog/2025.2/aldec/activehdl/app.xml
@@ -2,7 +2,7 @@
 <catalog>
   <apps>
     <app>
-      <revision_history>SPT82437 - Launching ActiveHDL from Vivado - Gets Stuck</revision_history>
+      <revision_history>BKO2283 - Change shell in the *.sh linux scripts</revision_history>
       <name>activehdl</name>
       <pkg_require>Vivado 2014.1</pkg_require>
       <company>aldec</company>

diff --git a/catalog/2025.2/aldec/activehdl/revision_history.txt b/catalog/2025.2/aldec/activehdl/revision_history.txt
@@ -1,4 +1,9 @@
-1.37 SPT82437 - Launching ActiveHDL from Vivado - Gets Stuck
+1.42 BKO2283 - Change shell in the *.sh linux scripts
+1.41 BKO2282 - Change descriptions of Coverage na SLP options
+1.40 BKO2015 - AXI Memory Map transactions recorder
+1.39 SPT83276 - Vivado 2020.02 - unable to generate simulation scripts for Active-HDL
+1.38 SPT83218 - TCL Store updated for Vivado 2025.1
+1.37 merged 2024.2 to 2025.1
 1.36 SPT82247 - A fix is required to replace get_files with get_files -compile_order
 1.35 merged 2023.2 to 2024.1
 1.34 Add support for VHDL2019

diff --git a/catalog/2025.2/aldec/alint/app.xml b/catalog/2025.2/aldec/alint/app.xml
@@ -0,0 +1,19 @@
+<?xml version="1.0" encoding="utf-8"?>
+<catalog>
+  <apps>
+    <app>
+      <revision_history>Add ALINT-PRO plugin (aldec::alint) for 2025.2-dev</revision_history>
+      <name>alint</name>
+      <company>aldec</company>
+      <company_display>Aldec, Inc.</company_display>
+      <summary>This is an Aldec ALINT-PRO Linter integration app that allows users to convert a Vivado project to an ALINT-PRO project. ALINT-PRO is a design verification solution for RTL code written in VHDL, Verilog, and SystemVerilog, which is focused on verifying coding style and naming conventions, RTL and post-synthesis simulation mismatches, smooth and optimal synthesis, correct FSM descriptions, avoiding problems on further design stages, clocks and reset tree issues, CDC, RDC, DFT, and coding for portability and reuse. You can generate an ALINT-PRO project and also start ALINT-PRO in GUI mode with the converted project directly from Vivado IDE. The ALINT-PRO project files are saved in the same location as the currently opened Vivado project. To run ALINT-PRO conversion, please ensure that the ALINT-PRO software and required licenses are available. For more details, please check the help message for the Tcl Procs below.</summary>
+      <display>ALINT-PRO Linter</display>
+      <procs>
+        <proc>
+          <name>convert_project</name>
+          <summary>Convert Vivado project to ALINT-PRO</summary>
+        </proc>
+      </procs>
+    </app>
+  </apps>
+</catalog>
diff --git a/catalog/2025.2/aldec/alint/revision_history.txt b/catalog/2025.2/aldec/alint/revision_history.txt
@@ -0,0 +1 @@
+1.0 Add ALINT-PRO plugin (aldec::alint) for 2025.2-dev
diff --git a/catalog/2025.2/aldec/riviera/app.xml b/catalog/2025.2/aldec/riviera/app.xml
@@ -2,7 +2,7 @@
 <catalog>
   <apps>
     <app>
-      <revision_history>SPT82437 - Launching ActiveHDL from Vivado - Gets Stuck</revision_history>
+      <revision_history>BKO2283 - Change shell in the *.sh linux scripts</revision_history>
       <name>riviera</name>
       <pkg_require>Vivado 2014.1</pkg_require>
       <company>aldec</company>

diff --git a/catalog/2025.2/aldec/riviera/revision_history.txt b/catalog/2025.2/aldec/riviera/revision_history.txt
@@ -1,4 +1,9 @@
-1.37 SPT82437 - Launching ActiveHDL from Vivado - Gets Stuck
+1.42 BKO2283 - Change shell in the *.sh linux scripts
+1.41 BKO2282 - Change descriptions of Coverage na SLP options
+1.40 BKO2015 - AXI Memory Map transactions recorder
+1.39 SPT83276 - Vivado 2020.02 - unable to generate simulation scripts for Active-HDL
+1.38 SPT83218 - TCL Store updated for Vivado 2025.1
+1.37 merged 2024.2 to 2025.1
 1.36 SPT82247 - A fix is required to replace get_files with get_files -compile_order
 1.35 merged 2023.2 to 2024.1
 1.34 Add support for VHDL2019

diff --git a/catalog/2025.2/xilinx/designutils/app.xml b/catalog/2025.2/xilinx/designutils/app.xml
@@ -2,7 +2,7 @@
 <catalog>
   <apps>
     <app>
-      <revision_history>Added new proc run_equiv_vivado_directives.tcl</revision_history>
+      <revision_history>Update equivalent directves for new directives</revision_history>
       <name>designutils</name>
       <pkg_require>Vivado 2014.1</pkg_require>
       <company>xilinx</company>

diff --git a/catalog/2025.2/xilinx/designutils/revision_history.txt b/catalog/2025.2/xilinx/designutils/revision_history.txt
@@ -1,3 +1,5 @@
+1.66 Update equivalent directves for new directives
+1.65 Remove version check out of enable_equiv_dir util
 1.64 Added new proc run_equiv_vivado_directives.tcl
 1.63 Various enhancements (report_failfast)
 1.62 Added report_nets and Tcl profiler. Various enhancements (report_failfast)

diff --git a/catalog/2025.2/xilinx/modelsim/app.xml b/catalog/2025.2/xilinx/modelsim/app.xml
@@ -2,7 +2,7 @@
 <catalog>
   <apps>
     <app>
-      <revision_history>check current design for intermediate impl stage</revision_history>
+      <revision_history>updated noc sub core version</revision_history>
       <name>modelsim</name>
       <pkg_require>Vivado 2014.1</pkg_require>
       <company>xilinx</company>

diff --git a/catalog/2025.2/xilinx/modelsim/revision_history.txt b/catalog/2025.2/xilinx/modelsim/revision_history.txt
@@ -1,4 +1,23 @@
-2.356 check current design for intermediate impl stage
+2.375 updated noc sub core version
+2.374 revert fix for scope header files for simulation compile order only
+2.373 scope header files for simulation compile order only
+2.372 updated help text for simulation settings
+2.371 fixed ddrmc5_inline_ecc to string var
+2.370 disable code for isoutilattrs.cdo export to sim dir
+2.369 disable code for isoutilattrs.cdo export
+2.368 export isoutilattrs.cdo for axi_noc2
+2.367 set sim gcc version for windows
+2.366 add comments for tasks
+2.365 replace sim and gcc version with shell var setting
+2.364 add logical NoC files
+2.363 add linked library to collection if not found
+2.362 performance improvements using data cache
+2.361 merged 2025.1 to 2025.2
+2.360 export aie_work_dir
+2.359 include axi interface include dir
+2.358 reference sim_version from args
+2.357 print msg for locked, custom ips
+2.356 merged 2024.2 to 2025.1
 2.355 remove equal sign for empty define value
 2.354 set current design in memory if design opened
 2.353 check for LD_LIBRARY_PATH env before appending

diff --git a/catalog/2025.2/xilinx/projutils/app.xml b/catalog/2025.2/xilinx/projutils/app.xml
@@ -2,7 +2,7 @@
 <catalog>
   <apps>
     <app>
-      <revision_history>nextgen_versal is deprecated property.</revision_history>
+      <revision_history>Skip activehdl properties</revision_history>
       <name>projutils</name>
       <pkg_require>Vivado 2014.1</pkg_require>
       <company>xilinx</company>
@@ -12,7 +12,7 @@
       <procs>
         <proc>
           <name>convert_ngc</name>
-          <summary>Convert all provided NGC files to a supported format</summary>
+          <summary/>
         </proc>
         <proc>
           <name>copy_run</name>

diff --git a/catalog/2025.2/xilinx/projutils/revision_history.txt b/catalog/2025.2/xilinx/projutils/revision_history.txt
@@ -1,4 +1,9 @@
-3.569 nextgen_versal is deprecated property.
+3.574 Skip activehdl properties
+3.573 Fix for CR-1218704 Copying run makes GUI to go into infinite loop.
+3.572 Fix for CR-1228988
+3.571 Introduce new option ip_repo_path
+3.570 Fix for CR-1216609
+3.569 merged 2024.2 to 2025.1
 3.568 Classic SoC Boot is a deprecated feature
 3.567 WPT should not write orphan inactive filesets from previous runs
 3.566 Fix for CR-1121058

diff --git a/catalog/2025.2/xilinx/questa/app.xml b/catalog/2025.2/xilinx/questa/app.xml
@@ -2,7 +2,7 @@
 <catalog>
   <apps>
     <app>
-      <revision_history>bind aietools library</revision_history>
+      <revision_history>updated noc sub core version</revision_history>
       <name>questa</name>
       <pkg_require>Vivado 2014.1</pkg_require>
       <company>xilinx</company>

diff --git a/catalog/2025.2/xilinx/questa/revision_history.txt b/catalog/2025.2/xilinx/questa/revision_history.txt
@@ -1,3 +1,28 @@
+2.339 updated noc sub core version
+2.338 revert fix for scope header files for simulation compile order only
+2.337 scope header files for simulation compile order only
+2.336 updated help text for simulation settings
+2.335 fixed ddrmc5_inline_ecc to string var
+2.334 disable code for isoutilattrs.cdo export to sim dir
+2.333 disable code for isoutilattrs.cdo export
+2.332 export isoutilattrs.cdo for axi_noc2
+2.331 skip sim gcc version for windows
+2.330 set sim gcc version for windows
+2.329 add comments for tasks
+2.328 replace sim and gcc version with shell var setting
+2.327 add logical NoC files
+2.326 add linked library to collection if not found
+2.325 performance improvements using data cache
+2.324 merged 2025.1 to 2025.2
+2.323 add vopt options to fix NoC/DDR assertion failures
+2.322 export aie_work_dir
+2.321 include axi interface include dir
+2.320 reference sim_version from args
+2.319 set ext lib path for non-precompile mode
+2.318 print msg for locked, custom ips
+2.317 fixed QIS logic
+2.316 fixed bug with QIS param
+2.315 enable QIS options
 2.314 bind aietools library
 2.313 check current design for intermediate impl stage
 2.312 reset scripts only mode for exec mode

diff --git a/catalog/2025.2/xilinx/vcs/app.xml b/catalog/2025.2/xilinx/vcs/app.xml
@@ -2,7 +2,7 @@
 <catalog>
   <apps>
     <app>
-      <revision_history>option to set debug_acc with debug_pp deprecation msg</revision_history>
+      <revision_history>updated noc sub core version</revision_history>
       <name>vcs</name>
       <pkg_require>Vivado 2014.1</pkg_require>
       <company>xilinx</company>

diff --git a/catalog/2025.2/xilinx/vcs/revision_history.txt b/catalog/2025.2/xilinx/vcs/revision_history.txt
@@ -1,4 +1,30 @@
-15.1 option to set debug_acc with debug_pp deprecation msg
+17.7 updated noc sub core version
+17.6 revert fix for scope header files for simulation compile order only
+17.5 scope header files for simulation compile order only
+17.4 fixed ddrmc5_inline_ecc to string var
+17.3 disable code for isoutilattrs.cdo export to sim dir
+17.2 disable code for isoutilattrs.cdo export
+17.1 export isoutilattrs.cdo for axi_noc2
+17.0 set sim gcc version for windows
+16.9 add comments for tasks
+16.8 replace sim and gcc version with shell var setting
+16.7 add logical NoC files
+16.6 add linked library to collection if not found
+16.5 check for VG_GNU_PACKAGE env
+16.4 source VCS GNU pkg gcc script explicitly to load VCS libraries first
+16.3 source gcc920_64 version in script
+16.2 auto set VCS_HOME in simulation scripts if not found
+16.1 performance improvements using data cache
+16.0 merged 2025.1 to 2025.2
+15.9 include axi interface include dir
+15.8 reference sim_version from args
+15.7 print msg for locked, custom ips
+15.6 bind dmv sip libs
+15.5 generate dmv compiled lib dirs
+15.4 dmv simulation support
+15.3 compile for uvm design
+15.2 removed deprecated debug_pp
+15.1 merged 2024.2 to 2025.1
 15.0 check current design for intermediate impl stage
 14.9 reset scripts only mode for exec mode
 14.8 remove equal sign for empty define value

diff --git a/catalog/2025.2/xilinx/xcelium/app.xml b/catalog/2025.2/xilinx/xcelium/app.xml
@@ -2,7 +2,7 @@
 <catalog>
   <apps>
     <app>
-      <revision_history>check current design for intermediate impl stage</revision_history>
+      <revision_history>updated noc sub core version</revision_history>
       <name>xcelium</name>
       <pkg_require>Vivado 2014.1</pkg_require>
       <company>xilinx</company>

diff --git a/catalog/2025.2/xilinx/xcelium/revision_history.txt b/catalog/2025.2/xilinx/xcelium/revision_history.txt
@@ -1,4 +1,25 @@
-11.171 check current design for intermediate impl stage
+11.194 updated noc sub core version
+11.193 revert fix for scope header files for simulation compile order only
+11.192 scope header files for simulation compile order only
+11.191 fixed ddrmc5_inline_ecc to string var
+11.190 disable code for isoutilattrs.cdo export to sim dir
+11.189 disable code for isoutilattrs.cdo export
+11.188 export isoutilattrs.cdo for axi_noc2
+11.187 add comment for signal visibility
+11.184 set sim gcc version for windows
+11.183 add comments for tasks
+11.182 replace sim and gcc version with shell var setting
+11.181 add logical NoC files
+11.180 add linked library to collection if not found
+11.179 pass -pkgsearch for finding system verilog packages
+11.178 performance improvements using data cache
+11.177 merged 2025.1 to 2025.2
+11.176 export aie_work_dir
+11.175 include axi interface include dir
+11.174 reference sim_version from args
+11.173 print msg for locked, custom ips
+11.172 fix bin util lib path
+11.171 merged 2024.2 to 2025.1
 11.170 reset scripts only mode for exec mode
 11.169 remove equal sign for empty define value
 11.168 set current design in memory if design opened

diff --git a/catalog/2025.2/xilinx/xsim/app.xml b/catalog/2025.2/xilinx/xsim/app.xml
@@ -2,7 +2,7 @@
 <catalog>
   <apps>
     <app>
-      <revision_history>bind aietools lib for AIE during run</revision_history>
+      <revision_history>updated noc sub core version</revision_history>
       <name>xsim</name>
       <pkg_require>Vivado 2014.1</pkg_require>
       <company>xilinx</company>

diff --git a/catalog/2025.2/xilinx/xsim/revision_history.txt b/catalog/2025.2/xilinx/xsim/revision_history.txt
@@ -1,4 +1,31 @@
-2.493 bind aietools lib for AIE during run
+2.520 updated noc sub core version
+2.519 revert fix for scope header files for simulation compile order only
+2.518 scope header files for simulation compile order only
+2.517 pass onerror quit for AIE
+2.516 updated help text for xsim settings
+2.515 fixed ddrmc5_inline_ecc to string var
+2.514 disable code for isoutilattrs.cdo export to sim dir
+2.513 disable code for isoutilattrs.cdo export
+2.512 export isoutilattrs.cdo for axi_noc2
+2.511 resolve RDI_DATADIR with absolute path
+2.510 set sim gcc version for windows
+2.509 add comments for tasks
+2.508 export sim and gcc version setting for integrated mode
+2.507 replace sim and gcc version with shell var setting
+2.506 add base library bindings for RTL project
+2.505 add logical NoC files
+2.504 add linked library to collection if not found
+2.503 performance improvements using data cache
+2.502 merged 2025.1 to 2025.2
+2.501 deprecate line coverage type
+2.500 export aie_work_dir
+2.499 include axi interface include dir
+2.498 set install path
+2.497 reference sim_version from args
+2.496 print msg for locked, custom ips
+2.495 add quotes for generic_top
+2.494 fixed use ini var name
+2.493 bind sip cores for Versal
 2.492 bind aietools lib for AIE
 2.491 check current design for intermediate impl stage
 2.490 reset scripts only mode for exec mode

diff --git a/catalog/catalog_2024.2.xml b/catalog/catalog_2024.2.xml
@@ -1,6 +1,6 @@
 <?xml version="1.0" encoding="utf-8"?>
 <catalog>
-  <remote>master</remote>
+  <remote>2024.2-dev</remote>
   <support_commit_id>6a2cba20d1913a59c1f774095af1f854f4a5b7f5</support_commit_id>
   <release>2024.2</release>
   <revision>2.5</revision>
Original file line number	Diff line number	Diff line change
		@@ -0,0 +1 @@
		1.0 Add ALINT-PRO plugin (aldec::alint) for 2025.2-dev