Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Meadow.Linux: Add support for Raspberry Pi 5 pinout #379

Closed
wants to merge 1 commit into from

Conversation

microhobby
Copy link
Contributor

The Raspberry Pi 5 pinout is quite different from the previous versions, so we need to add a new pinout class for it. It use a in house developed silicon for I/O, the RP1 I/O controller. It's comes with a new pinctrl driver that changed the sysfs base from 0 to 53 and the gpiochip bank from gpiochip0 to gpiochip4.

However, reusing what we already have from previous versions of the Raspberry Pi we can support this in a simple way, modifying LinuxFlexiPin to allow changing the SysFsGpio and GpiodChip.

The Raspberry Pi 5 pinout is quite different from the previous
versions, so we need to add a new pinout class for it. It use a
in house developed silicon for I/O, the RP1 I/O controller. It's
comes with a new pinctrl driver that changed the sysfs base from
0 to 53 and the gpiochip bank from gpiochip0 to gpiochip4.

However, reusing what we already have from previous versions of
Raspberry Pi, we can support this simply by modifying
the LinuxFlexiPin to allow changing the SysFsGpio and
GpiodChip.

Signed-off-by: Matheus Castello <matheus.castello@toradex.com>
// the sysfs base for the pinctrl-rpi1 is 53
// the gpiochip bank for pinctrl-rpi1 on rpi5 is gpiochip4
foreach (LinuxFlexiPin pin in this.AllPins) {
pin.SysFsGpio += 53;
Copy link

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Does this apply to GpiodOffset also?

Copy link
Contributor Author

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

hey @bcr , no for libgpiod what's changed is the gpiochip number, but the offset continues the same.

Copy link

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Just to make sure -- there's an integer property called SysFsGpio that you have added 53 to. There is an additional integer property called GpiodOffset that in the base class has the exact same value as SysFsGpio but is not adjusted here. I do understand that you changed the GpiodChip field also.

// the sysfs base for the pinctrl-rpi1 is 53
// the gpiochip bank for pinctrl-rpi1 on rpi5 is gpiochip4
foreach (LinuxFlexiPin pin in this.AllPins) {
pin.SysFsGpio += 53;
Copy link
Contributor Author

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

hey @bcr , no for libgpiod what's changed is the gpiochip number, but the offset continues the same.

@adrianstevens
Copy link
Contributor

Thanks - this is great, we're in the process of sourcing a Pi5. We'll test and likely merge when it arrives.

@johnkattenhorn
Copy link

@adrianstevens, @microhobby - this looks cool, I have a Pi 5 so I'm going to pull this and give it a try.

@ctacke
Copy link
Contributor

ctacke commented Feb 23, 2024

Finally received my Pi 5! I'll start verifying these pinouts

@ctacke
Copy link
Contributor

ctacke commented Feb 24, 2024

I'm attacking this to allow running without different pinouts between Pi3,4 and 5, since the physical mapping remains the same.
#442

@ctacke ctacke closed this Feb 24, 2024
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Labels
None yet
Projects
None yet
Development

Successfully merging this pull request may close these issues.

5 participants