
Description
(This is an expanded version of issue (WebAssembly/spec#446))
Multi-precision arithmetic requires special handling. This is available in some form in all ISAs, but not currently available in webasm.
There are basically three ways of doing this (it seems to me), none of which is especially palatable in the context of the current design:
Option 1. Add a special flags register, together with instructions that do arithmetic with that register.
This is the traditional approach in mainstream hardware.
You get instructions like
addc
which will add two numbers, and the value of the carry flag, and set the carry flag on the result.
This is not pleasant because it adds a special register.
Option 2.
Support a form of 60bit arithmetic with 4 bits for flags.
Option 3.
Support multi-word arithmetic: addition takes 3 arguments and produces 2 outputs.
This approach will do the least damage to the existing ISA and register architecture. However, this will be hard to map to existing hardware efficiently (not all hardware ISAs support loading the flags register directly.
However it is done, multi-precision arithmetic is quite important and very hard to emulate without some simple hardware support.