Merge pull request #136 from VisorFolks/development

Development
VisorFolks · Apr 30, 2022 · 1479c4b · 1479c4b
2 parents b1d2b49 + 1bd31ea
commit 1479c4b
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diff --git a/README.md b/README.md
@@ -14,14 +14,14 @@
   </div>
 </body>
 
-> **Version (arch:2 | major:4 | minor:2): 1.2.1**
+> **Version (arch:2 | major:4 | minor:2): 1.2.2**
 
 [![GitHub CI](https://github.com/VisorFolks/cyancore/actions/workflows/github_ci.yml/badge.svg)](https://github.com/VisorFolks/cyancore/actions/workflows/github_ci.yml)
 [![Quality Gate Status](https://sonarcloud.io/api/project_badges/measure?project=VisorFolks_cyancore&metric=alert_status)](https://sonarcloud.io/summary/new_code?id=VisorFolks_cyancore)
 [![Security Rating](https://sonarcloud.io/api/project_badges/measure?project=VisorFolks_cyancore&metric=security_rating)](https://sonarcloud.io/summary/new_code?id=VisorFolks_cyancore)
 
 ### Join VisorFolks Forum
-Connect with us over VisorFolks discord server: [ [**JOIN**](https://discord.gg/gxUQr77MT2) ]
+Connect with us over VisorFolks discord server: < [**JOIN**](https://discord.gg/gxUQr77MT2) >
 
 ### Supported Platforms
 

diff --git a/mk/elf.mk b/mk/elf.mk
@@ -25,7 +25,7 @@ elf: $(ELF)
 $(ELF): $(DEP_LIBS) $(DEP_OBJS) $(LD_SCRIPT) $(LD_SUPPLEMENT)
 	@echo "Elf: Generating $(@F) ..."
 	$(LD) -dT $(LD_SCRIPT) $(addprefix -T , $(LD_SUPPLEMENT)) $(LD_FLAGS) -Map=$(@:.elf=.map) -o $@ $(filter %.o, $^) $(DEP_LIB_PATH) $(DEP_LIBS_ARG) -L $(TL) -lgcc
-	$(OD) -Dx -h $@ > $(@:.elf=.lst)
+	$(OD) -Dx -h --wide $@ > $(@:.elf=.lst)
 	$(OC) -O binary $@ $(@:.elf=.bin)
 	$(OC) -O ihex $@ $(@:.elf=.hex)
 	@echo "=================================================="

diff --git a/mk/tc.mk b/mk/tc.mk
@@ -20,7 +20,7 @@ ifeq ($(findstring riscv,$(ARCH)),riscv)
 TC	?= $(TOOLS_ROOT)/risc-v-toolchain/bin/riscv64-unknown-elf
 TI	:= $(TOOLS_ROOT)/risc-v-toolchain/lib/gcc/riscv64-unknown-elf/$(TC_VER)/include-fixed/
 TI	+= $(TOOLS_ROOT)/risc-v-toolchain/riscv64-unknown-elf/include/
-TL	:= $(TOOLS_ROOT)/risc-v-toolchain/lib/gcc/riscv64-unknown-elf/$(TC_VER)/
+TL	:= $(TOOLS_ROOT)/risc-v-toolchain/lib/gcc/riscv64-unknown-elf/$(TC_VER)/rv$(BIT)$(ARCH_VARIANT)/$(ARCH_ABI)/
 endif
 
 ifeq ($(findstring avr,$(ARCH)),avr)

diff --git a/src/arch/avr/8/common_5x_6/terravisor/include/avr.h b/src/arch/avr/8/common_5x_6/terravisor/include/avr.h
@@ -14,6 +14,7 @@
 #include <stdint.h>
 #include <mmio.h>
 #include <string.h>
+#include <stdbool.h>
 
 typedef struct context_frame
 {
@@ -28,3 +29,4 @@ typedef uint8_t istate_t;
 
 context_frame_t *get_context_frame();
 void arch_panic_handler_callback();
+bool in_isr(void);
diff --git a/src/arch/avr/8/common_5x_6/terravisor/interrupt_handler.c b/src/arch/avr/8/common_5x_6/terravisor/interrupt_handler.c
@@ -10,6 +10,7 @@
 
 #include <stddef.h>
 #include <stdint.h>
+#include <stdbool.h>
 #include <status.h>
 #include <string.h>
 #include <assert.h>
@@ -19,6 +20,11 @@
 
 static context_frame_t *local_frame;
 
+bool in_isr(void)
+{
+	return (local_frame != NULL) ? true : false;
+}
+
 static void set_context_frame(context_frame_t *frame)
 {
 	local_frame = frame;

diff --git a/src/arch/riscv/32/i/terravisor/exception_handler.c b/src/arch/riscv/32/i/terravisor/exception_handler.c
@@ -10,6 +10,7 @@
  */
 
 #include <stdint.h>
+#include <stdbool.h>
 #include <status.h>
 #include <assert.h>
 #include <arch.h>
@@ -19,6 +20,12 @@ static void (* exhandler[N_CORES][N_EXCEP])(void) = {{[0 ... N_EXCEP-1] = arch_p
 static void (* irqhandler[N_CORES][N_IRQ])(void) = {{[0 ... N_IRQ-1] = arch_unhandled_irq}};
 static context_frame_t *local_frame[N_CORES];
 
+bool in_isr(void)
+{
+	unsigned int cpuid = arch_core_index();
+	return (local_frame[cpuid] != NULL) ? true : false;
+}
+
 static void set_context_frame(context_frame_t *frame)
 {
 	unsigned int cpuid = arch_core_index();
@@ -62,5 +69,6 @@ void exception_handler(uint32_t mcause, context_frame_t *frame)
 		exhandler[cpuid][cause]();
 		frame->mepc += (MMIO8(frame->mepc) & 0x3) ? 4 : 2;
 	}
+	set_context_frame(NULL);
 	fence(ow, ow);
 }
diff --git a/src/arch/riscv/32/i/terravisor/include/riscv.h b/src/arch/riscv/32/i/terravisor/include/riscv.h
@@ -12,6 +12,7 @@
 #pragma once
 #define _RISC_V_
 #include <stdint.h>
+#include <stdbool.h>
 
 #define fence(predecessor, successor)	asm volatile("fence " #predecessor ", " #successor ::: "memory")
 
@@ -57,3 +58,4 @@ static inline unsigned int arch_core_impid()
 
 void riscv_update_vector();
 context_frame_t *get_context_frame();
+bool in_isr(void);
diff --git a/src/engine/banner.mk b/src/engine/banner.mk
@@ -10,7 +10,7 @@
 
 .PHONY:	version
 NAME		= Helium
-VERSION		= 0x01000201
+VERSION		= 0x01000202
 
 $(eval $(call add_define,VERSION))
 

diff --git a/src/lib/libresource/sp/sp_visor.c b/src/lib/libresource/sp/sp_visor.c
@@ -13,8 +13,8 @@ swdev_t *sp_terravisor_dev_info(sw_devid_t devid)
 		{
 			for(j = 0; j < n_swdevs; j++)
 			{
-				if(devid == sw_prop->swdev[i]->swdev_id)
-					return sw_prop->swdev[i];
+				if(devid == sw_prop->swdev[j]->swdev_id)
+					return sw_prop->swdev[j];
 			}
 		}
 	}
@@ -33,8 +33,8 @@ swdev_t *sp_nsec_hypervisor_dev_into(sw_devid_t devid)
 		{
 			for(j = 0; j < n_swdevs; j++)
 			{
-				if(devid == sw_prop->swdev[i]->swdev_id)
-					return sw_prop->swdev[i];
+				if(devid == sw_prop->swdev[j]->swdev_id)
+					return sw_prop->swdev[j];
 			}
 		}
 	}
@@ -54,8 +54,8 @@ swdev_t *sp_sec_hypervisor_dev_info(sw_devid_t devid)
 		{
 			for(j = 0; j < n_swdevs; j++)
 			{
-				if(devid == sw_prop->swdev[i]->swdev_id)
-					return sw_prop->swdev[i];
+				if(devid == sw_prop->swdev[j]->swdev_id)
+					return sw_prop->swdev[j];
 			}
 		}
 	}
@@ -75,8 +75,8 @@ swdev_t *sp_nsec_supervisor_dev_info(size_t index, sw_devid_t devid)
 		{
 			for(j = 0; j < n_swdevs; j++)
 			{
-				if(devid == sw_prop->swdev[i]->swdev_id)
-					return sw_prop->swdev[i];
+				if(devid == sw_prop->swdev[j]->swdev_id)
+					return sw_prop->swdev[j];
 			}
 		}
 	}
@@ -96,8 +96,8 @@ swdev_t *sp_sec_supervisor_dev_info(size_t index, sw_devid_t devid)
 		{
 			for(j = 0; j < n_swdevs; j++)
 			{
-				if(devid == sw_prop->swdev[i]->swdev_id)
-					return sw_prop->swdev[i];
+				if(devid == sw_prop->swdev[j]->swdev_id)
+					return sw_prop->swdev[j];
 			}
 		}
 	}

diff --git a/src/platform/sifive/common_fe310/sections.ld.sx b/src/platform/sifive/common_fe310/sections.ld.sx
@@ -30,7 +30,7 @@ ENTRY(entry)
 
 SECTIONS
 {
-	.text :
+	.text : ALIGN(4)
 	{
 		KEEP(*(.text.entry))
 		*(.text)
@@ -39,9 +39,9 @@ SECTIONS
 		. = ALIGN(4);
 	} > vma_imem AT > lma_mem
 
-	.rodata :
+	.rodata : ALIGN(4)
 	{
-		. = ALIGN(1);
+		. = ALIGN(4);
 		*(.version)
 		KEEP(*(.version))
 		KEEP(*(.rdata))
@@ -52,25 +52,25 @@ SECTIONS
 		KEEP(*(.srodata))
 	} > vma_imem AT > lma_mem
 
-	.itim :
+	.itim : ALIGN(4)
 	{
 		. = ALIGN(4);
 		KEEP(*(.itim))
 		*(.itim.*)
 	} > vma_itmem AT > lma_mem
 
-	.bss :
+	.bss : ALIGN(8)
 	{
-		. = ALIGN(1);
+		. = ALIGN(8);
 		*(.bss)
 		*(.bss.*)
 		KEEP(*(.bss))
 		*(COMMON)
 	} > vma_dmem
 
-	.static_bss_global :
+	.static_bss_global : ALIGN(8)
 	{
-		. = ALIGN(1);
+		. = ALIGN(8);
 		*(.sbss)
 		*(.sbss.*)
 		KEEP(*(.sbss))
@@ -80,37 +80,39 @@ SECTIONS
 	{
 	} > vma_dmem
 
-	.static_data_global :
+	.static_data_global : ALIGN(8)
 	{
-		. = ALIGN(1);
+		. = ALIGN(8);
 		*(.sdata)
 		*(.sdata.*)
 		KEEP(*(.sdata))
 	} > vma_dmem AT > lma_mem
 
-	.data :
+	.data : ALIGN(8)
 	{
-		. = ALIGN(1);
+		. = ALIGN(8);
 		*(.data)
 		*(.data.*)
 		KEEP(*(.data))
 	} > vma_dmem AT > lma_mem
 
-	.tdata :
+	.tdata : ALIGN(8)
 	{
-		. = ALIGN(1);
+		. = ALIGN(8);
 		*(.tdata)
 		*(.tdata.*)
 		KEEP(*(.tdata))
 	} > vma_dmem AT > lma_mem
 
-	.driver_table : ALIGN(1) {} > vma_dmem AT > lma_mem
-	.mcall_table : ALIGN(1) {} > vma_dmem AT > lma_mem
+	.driver_table : ALIGN(8) {} > vma_dmem AT > lma_mem
+	.mcall_table : ALIGN(8) {} > vma_dmem AT > lma_mem
 
-	.stack :
+	.stack : ALIGN(16)
 	{
+		. = ALIGN(16);
 		*(.stack)
 		KEEP(*(.stack))
+		. = . + STACK_SIZE;
 	} > vma_dmem
 
 	PROVIDE(_data_start = LOADADDR(.static_data_global));
@@ -124,7 +126,7 @@ SECTIONS
 	PROVIDE(_stack_start = ADDR(.stack) + STACK_SIZE);
 
 	PROVIDE(_bss_start = ADDR(.bss));
-	PROVIDE(_bss_size = SIZEOF(.bss) + SIZEOF(.static_bss_global));
+	PROVIDE(_bss_size = SIZEOF(.bss) + SIZEOF(.static_bss_global) + 4);
 
 	PROVIDE(_itim_start = LOADADDR(.itim));
 	PROVIDE(_itim_size = SIZEOF(.itim));
@@ -134,7 +136,6 @@ SECTIONS
 	PROVIDE(_flash_size = _data_size + SIZEOF(.text) + _itim_size + SIZEOF(.rodata));
 	PROVIDE(_ram_size = _bss_size + _data_size + SIZEOF(.stack));
 
-
 	ASSERT((_flash_size < FLASH_SIZE), "< x > Flash size exceeded ...")
 	ASSERT((_ram_size < RAM_SIZE), "< x > RAM size exceeded ...")
 

diff --git a/src/platform/sifive/fe310g002/build.mk b/src/platform/sifive/fe310g002/build.mk
@@ -15,7 +15,8 @@ FE310G002_DIR	:= $(GET_PATH)
 ARCH		:= riscv
 BIT		:= 32
 ARCH_VARIANT	:= imac
-TARGET_FLAGS	+= -march=rv32imac -mabi=ilp32
+ARCH_ABI	:= ilp32
+TARGET_FLAGS	+= -march=rv32imac -mabi=$(ARCH_ABI)
 PLAT_INCLUDE	+= $(FE310G002_DIR)/include
 OUTPUT_FORMAT	:= elf32-littleriscv