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Emit semantic condition groups in ARM and Thumb lifted IL and classify VFP comparison flag writes separately from integer writes. GE can then resolve directly to floating >= before MLIL or HLIL propagation. Map only floating conditions that exactly match the architectural NZCV outcomes, preserving flag expansion for unordered-inclusive conditions and mixed definitions. Keep carry inversion boolean-sized and update lifting expectations. Add public regression tests for all 14 conditions in ARM and Thumb mode at both floating widths, including NaNs, signed zero, infinities, overwritten flags, and integer comparison controls. Validation: all 62 public semantic tests pass against the existing core, and the existing ARM/Thumb lifting suite passes.
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ARM and Thumb
GEafter a VFP comparison currently expands intoN == V, producing(a < b) == is_unordered(a, b)in higher IL. Emit semantic flag groups and classify VFP flag writes as floating point so the resolver can produceLLIL_FCMP_GEdirectly.Map only predicates that exactly match the VFP NZCV outcomes. Conditions that include unordered outcomes, and conditions with mixed reaching flag definitions, retain the architectural flag expression. Integer condition mappings are preserved; VFP carry inversion uses boolean-width NOT.