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Submission template for Tiny Tapeout 6 - Verilog HDL Projects
Submission template for Tiny Tapeout 06 - Verilog HDL Projects
This repository contains the codebase for Virtual FPGA Lab in Makerchip contributing as a participant in Google Summer of Code 2021, under FOSSi Foundation.
Collect some IC specs for learning.
Collect some IC textbooks for learning.
List of awesome open source hardware tools, generators, and reusable designs
In this project, Canny edge detection, one of the efficient edge detection algorithms is implemented on a Zedboard FPGA using verilog. The input image is stored on a PC and fed to the FPGA. The out…
List of awesome semiconductor startups
cocotb, a coroutine based cosimulation library for writing VHDL and Verilog testbenches in Python
This repository contains the details of controlling a 3-DOF robotic arm with 4 servo motors using FPGA. The design is execute using the Nexys-4 DDR Artix-7 FPGA of Xilinx. This repo contails all th…
This repo provide an index of VLSI content creators and their materials
Parameterized Verilog code for Image Sharpening (Laplacian Filter) and Image smoothening (Average Filter) on 128x128 image
Pipelined implementation of Sobel Edge Detection on OV7670 camera and on still images
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