style: run github.com/psf/black

examples/verilog/verilog_ams/run.py

@@ -12,6 +12,8 @@
 vu = VUnit.from_argv()
 lib = vu.add_library("lib")
 lib.add_source_files(join(root, "*.sv"))
-lib.add_source_files(join(root, "*.vams")).set_compile_option("modelsim.vlog_flags", ["-ams"])
+lib.add_source_files(join(root, "*.vams")).set_compile_option(
+    "modelsim.vlog_flags", ["-ams"]
+)
 
 vu.main()

examples/vhdl/array/run.py

@@ -22,11 +22,10 @@
 vu.add_osvvm()
 vu.add_array_util()
 
-src_path = join(dirname(__file__), 'src')
+src_path = join(dirname(__file__), "src")
 
-vu.add_library('lib').add_source_files([
-    join(src_path, '*.vhd'),
-    join(src_path, 'test', '*.vhd')
-])
+vu.add_library("lib").add_source_files(
+    [join(src_path, "*.vhd"), join(src_path, "test", "*.vhd")]
+)
 
 vu.main()

examples/vhdl/array_axis_vcs/run.py

@@ -29,10 +29,9 @@
 
 src_path = join(dirname(__file__), "src")
 
-vu.add_library("lib").add_source_files([
-    join(src_path, "*.vhd"),
-    join(src_path, "**", "*.vhd")
-])
+vu.add_library("lib").add_source_files(
+    [join(src_path, "*.vhd"), join(src_path, "**", "*.vhd")]
+)
 
 # vu.set_sim_option('modelsim.init_files.after_load',['runall_addwave.do'])
 

examples/vhdl/axi_dma/run.py

@@ -24,9 +24,8 @@
 
 src_path = join(dirname(__file__), "src")
 
-vu.add_library("axi_dma_lib").add_source_files([
-    join(src_path, "*.vhd"),
-    join(src_path, "test", "*.vhd")
-])
+vu.add_library("axi_dma_lib").add_source_files(
+    [join(src_path, "*.vhd"), join(src_path, "test", "*.vhd")]
+)
 
 vu.main()

examples/vhdl/check/run.py

@@ -18,9 +18,23 @@
 
 # Enable location preprocessing but exclude all but check_false to make the example less bloated
 vu.enable_location_preprocessing(
-    exclude_subprograms=['debug', 'info', 'check', 'check_failed', 'check_true', 'check_implication',
-                         'check_stable', 'check_equal', 'check_not_unknown', 'check_zero_one_hot',
-                         'check_one_hot', 'check_next', 'check_sequence', 'check_relation'])
+    exclude_subprograms=[
+        "debug",
+        "info",
+        "check",
+        "check_failed",
+        "check_true",
+        "check_implication",
+        "check_stable",
+        "check_equal",
+        "check_not_unknown",
+        "check_zero_one_hot",
+        "check_one_hot",
+        "check_next",
+        "check_sequence",
+        "check_relation",
+    ]
+)
 
 vu.enable_check_preprocessing()
 

examples/vhdl/com/run.py

@@ -21,7 +21,7 @@
 vu.add_verification_components()
 vu.add_osvvm()
 
-vu.add_library('lib').add_source_files(join(dirname(__file__), 'src', '*.vhd'))
-vu.add_library('tb_lib').add_source_files(join(dirname(__file__), 'test', '*.vhd'))
+vu.add_library("lib").add_source_files(join(dirname(__file__), "src", "*.vhd"))
+vu.add_library("tb_lib").add_source_files(join(dirname(__file__), "test", "*.vhd"))
 
 vu.main()

examples/vhdl/composite_generics/run.py

@@ -21,15 +21,15 @@ def encode(tb_cfg):
 
 vu = VUnit.from_argv()
 
-tb_lib = vu.add_library('tb_lib')
-tb_lib.add_source_files(join(dirname(__file__), 'test', '*.vhd'))
+tb_lib = vu.add_library("tb_lib")
+tb_lib.add_source_files(join(dirname(__file__), "test", "*.vhd"))
 
 test_1 = tb_lib.test_bench("tb_composite_generics").test("Test 1")
 
 vga_tb_cfg = dict(image_width=640, image_height=480, dump_debug_data=False)
-test_1.add_config(name='VGA', generics=dict(encoded_tb_cfg=encode(vga_tb_cfg)))
+test_1.add_config(name="VGA", generics=dict(encoded_tb_cfg=encode(vga_tb_cfg)))
 
 tiny_tb_cfg = dict(image_width=4, image_height=3, dump_debug_data=True)
-test_1.add_config(name='tiny', generics=dict(encoded_tb_cfg=encode(tiny_tb_cfg)))
+test_1.add_config(name="tiny", generics=dict(encoded_tb_cfg=encode(tiny_tb_cfg)))
 
 vu.main()

examples/vhdl/external_buffer/cp.py

@@ -8,24 +8,22 @@
 from os import popen
 from os.path import join, dirname
 
-src_path = join(dirname(__file__), 'src')
+src_path = join(dirname(__file__), "src")
 
-c_obj = join(src_path, 'cp.o')
+c_obj = join(src_path, "cp.o")
 # Compile C application to an object
-print(popen(' '.join([
-    'gcc', '-fPIC',
-    '-c', join(src_path, 'cp.c'),
-    '-o', c_obj
-])).read())
+print(
+    popen(" ".join(["gcc", "-fPIC", "-c", join(src_path, "cp.c"), "-o", c_obj])).read()
+)
 
 # Enable the external feature for strings
-vu = VUnit.from_argv(vhdl_standard='2008', compile_builtins=False)
-vu.add_builtins({'string': True})
+vu = VUnit.from_argv(vhdl_standard="2008", compile_builtins=False)
+vu.add_builtins({"string": True})
 
-lib = vu.add_library('lib')
-lib.add_source_files(join(src_path, 'tb_extcp_*.vhd'))
+lib = vu.add_library("lib")
+lib.add_source_files(join(src_path, "tb_extcp_*.vhd"))
 
 # Add the C object to the elaboration of GHDL
-vu.set_sim_option('ghdl.elab_flags', ['-Wl,' + c_obj])
+vu.set_sim_option("ghdl.elab_flags", ["-Wl," + c_obj])
 
 vu.main()

examples/vhdl/external_buffer/run.py

@@ -29,24 +29,24 @@
 from os import popen
 from os.path import join, dirname
 
-src_path = join(dirname(__file__), 'src')
+src_path = join(dirname(__file__), "src")
 
-c_obj = join(src_path, 'main.o')
+c_obj = join(src_path, "main.o")
 # Compile C application to an object
-print(popen(' '.join([
-    'gcc', '-fPIC',
-    '-c', join(src_path, 'main.c'),
-    '-o', c_obj
-])).read())
+print(
+    popen(
+        " ".join(["gcc", "-fPIC", "-c", join(src_path, "main.c"), "-o", c_obj])
+    ).read()
+)
 
 # Enable the external feature for strings
-vu = VUnit.from_argv(vhdl_standard='2008', compile_builtins=False)
-vu.add_builtins({'string': True})
+vu = VUnit.from_argv(vhdl_standard="2008", compile_builtins=False)
+vu.add_builtins({"string": True})
 
-lib = vu.add_library('lib')
-lib.add_source_files(join(src_path, 'tb_ext_*.vhd'))
+lib = vu.add_library("lib")
+lib.add_source_files(join(src_path, "tb_ext_*.vhd"))
 
 # Add the C object to the elaboration of GHDL
-vu.set_sim_option('ghdl.elab_flags', ['-Wl,' + c_obj])
+vu.set_sim_option("ghdl.elab_flags", ["-Wl," + c_obj])
 
 vu.main()

examples/vhdl/generate_tests/run.py

@@ -28,8 +28,7 @@ def post_check(output_path):
         This function recives the output_path of the test
         """
 
-        expected = ", ".join([str(data_width),
-                              str(sign).lower()]) + "\n"
+        expected = ", ".join([str(data_width), str(sign).lower()]) + "\n"
 
         output_file = join(output_path, "generics.txt")
 
@@ -56,10 +55,8 @@ def generate_tests(obj, signs, data_widths):
         # Add the configuration with a post check function to verify the output
         obj.add_config(
             name=config_name,
-            generics=dict(
-                data_width=data_width,
-                sign=sign),
-            post_check=make_post_check(data_width, sign)
+            generics=dict(data_width=data_width, sign=sign),
+            post_check=make_post_check(data_width, sign),
         )
 
 

examples/vhdl/json4vhdl/run.py

@@ -24,7 +24,7 @@
 vu.add_library("test").add_source_files(join(root, "src/test/*.vhd"))
 
 tb_cfg = read_json(join(root, "src/test/data/data.json"))
-tb_cfg["dump_debug_data"]=False
+tb_cfg["dump_debug_data"] = False
 vu.set_generic("tb_cfg", encode_json(tb_cfg))
 
 vu.main()

examples/vhdl/third_party_integration/run.py

@@ -8,5 +8,5 @@
 from vunit import VUnit
 
 vu = VUnit.from_argv()
-vu.add_library("lib").add_source_files(join(dirname(__file__), 'test', '*.vhd'))
+vu.add_library("lib").add_source_files(join(dirname(__file__), "test", "*.vhd"))
 vu.main()

examples/vhdl/vivado/generate_vivado_project.py

@@ -15,8 +15,7 @@ def main():
     if exists(join(root, project_name)):
         rmtree(join(root, project_name))
 
-    run_vivado(join(root, "tcl", "generate_project.tcl"),
-               tcl_args=[root, "myproject"])
+    run_vivado(join(root, "tcl", "generate_project.tcl"), tcl_args=[root, "myproject"])
 
 
 if __name__ == "__main__":

examples/vhdl/vivado/run.py

@@ -27,7 +27,7 @@
 add_vivado_ip(
     vu,
     output_path=join(root, "vivado_libs"),
-    project_file=join(root, "myproject", "myproject.xpr")
+    project_file=join(root, "myproject", "myproject.xpr"),
 )
 
 vu.main()

examples/vhdl/vivado/vivado_util.py

@@ -10,9 +10,11 @@
 from os.path import join, exists, abspath, dirname, basename
 from os import makedirs
 from vunit.simulator_factory import SIMULATOR_FACTORY
-from vunit.vivado import (run_vivado,
-                          add_from_compile_order_file,
-                          create_compile_order_file)
+from vunit.vivado import (
+    run_vivado,
+    add_from_compile_order_file,
+    create_compile_order_file,
+)
 
 
 def add_vivado_ip(vunit_obj, output_path, project_file):
@@ -47,13 +49,19 @@ def compile_standard_libraries(vunit_obj, output_path):
         if simname == "rivierapro":
             simname = "riviera"
 
-        run_vivado(join(dirname(__file__), "tcl", "compile_standard_libs.tcl"),
-                   tcl_args=[simname,
-                             simulator_class.find_prefix().replace("\\", "/"),
-                             output_path])
+        run_vivado(
+            join(dirname(__file__), "tcl", "compile_standard_libs.tcl"),
+            tcl_args=[
+                simname,
+                simulator_class.find_prefix().replace("\\", "/"),
+                output_path,
+            ],
+        )
 
     else:
-        print("Standard libraries already exists in %s, skipping" % abspath(output_path))
+        print(
+            "Standard libraries already exists in %s, skipping" % abspath(output_path)
+        )
 
     for library_name in ["unisim", "unimacro", "unifast", "secureip", "xpm"]:
         path = join(output_path, library_name)
@@ -77,8 +85,13 @@ def add_project_ip(vunit_obj, project_file, output_path, vivado_path=None, clean
     compile_order_file = join(output_path, "compile_order.txt")
 
     if clean or not exists(compile_order_file):
-        create_compile_order_file(project_file, compile_order_file, vivado_path=vivado_path)
+        create_compile_order_file(
+            project_file, compile_order_file, vivado_path=vivado_path
+        )
     else:
-        print("Vivado project Compile order already exists, re-using: %s" % abspath(compile_order_file))
+        print(
+            "Vivado project Compile order already exists, re-using: %s"
+            % abspath(compile_order_file)
+        )
 
     return add_from_compile_order_file(vunit_obj, compile_order_file)