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fix(cuda): integer_vif filter1d width guard + integer_adm CM operator-precedence x2 - #637
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…tion vertical halo (ADR-1030) (#639) Rebased onto master (post-PR#638, #641, #642, #637, #640 squash) — resolved UNION conflicts in docs/adr/README.md, docs/rebase-notes.md, docs/state.md; no code conflicts. Co-authored-by: Lusoris <lusoris@pm.me> Co-authored-by: Claude Sonnet 4.6 <noreply@anthropic.com>
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Summary
Three HIGH-severity CUDA kernel arithmetic bugs found in the r6-cuda-kernel audit:
filter1d.culine 557 — 16-bit vertical rd-filter upper-bound guard wrotefwidth_rd - fwidth_rd(always 0) instead offwidth - fwidth_rd. Tap window widened to cover allfwidthtaps;vif_filt.filter[scale+1]indexed 1–4 entries past allocation — OOB reads, wrong VIF scores at scales 0–2.adm_cm.culines 373 + 712 —x_sq = ... + add_shift_sq >> shift_sqparsed as+ (add_shift_sq >> shift_sq)=+ 0(C++ operator precedence:>>binds tighter than+). Normalisation shift silently dropped;x_sq~10^6 instead of ~0–1; int32 overflow; wrong ADM scale-0 and AIM scores.Files changed
core/src/feature/cuda/integer_vif/filter1d.cu— fix upper-bound guard typocore/src/feature/cuda/integer_adm/adm_cm.cu— add parentheses to twox_sqexpressionsADR-0108 deliverables checklist
core/src/feature/cuda/AGENTS.mdmeson test -C build-cuda --suite=fast+scripts/dev/cross_backend_diff.pyCPU vs CUDA for VIF + ADM (expected: convergence within existing tolerance)changelog.d/fixed/cuda-vif-filter1d-adm-cm-kernel-fixes.mddocs/rebase-notes.md(top entry)Smoke test
meson test -C build --suite=fast(CPU build): 50/50 OK. CUDA-specific smoke requiresbuild-cuda(CUDA device not available in this environment — CI will surface).No docs update required
This PR does not change any user-discoverable surface (no CLI flags, public C API, meson options, or output schema changes). Internal kernel arithmetic fix only.
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