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Added Verilog include files directive to fix Verific parsing order issue.

Signed-off-by: Jeff Ng <jeffng@precisioninno.com>
@maliberty maliberty enabled auto-merge December 31, 2025 16:43
@maliberty maliberty disabled auto-merge December 31, 2025 16:51
@maliberty maliberty merged commit e4d680c into The-OpenROAD-Project:master Dec 31, 2025
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@maliberty maliberty deleted the fix-rapidus-ethmac-verific branch December 31, 2025 16:51
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This fixed the include path but now

[WARN] File ./designs/rapidus2hp/ethmac//rules-verific.json not found

please add a rules file

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private PR: https://github.com/The-OpenROAD-Project-private/OpenROAD-flow-scripts/pull/1435

Will sync to public once it passes

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3 participants