Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Documentation Restructure #1337

Merged
merged 6 commits into from
Sep 12, 2022
Merged

Documentation Restructure #1337

Changes from 1 commit
Commits
Show all changes
6 commits
Select commit Hold shift + click to select a range
34d28f7
Documentation Restructure
donn Sep 8, 2022
456fb5c
Fix rtd.yml
donn Sep 8, 2022
95777cf
GitHub [skip ci]
donn Sep 8, 2022
2aba870
Fixes and tweaks
donn Sep 8, 2022
63a1194
Update docs_contribution.rst
donn Sep 12, 2022
9d0f763
Update chip_integration.md
donn Sep 12, 2022
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
Prev Previous commit
Update chip_integration.md 
[skip ci]
  • Loading branch information
@donn
donn authored Sep 12, 2022
commit 9d0f763bd61009d068de95796502d810003946ee
2 changes: 1 addition & 1 deletion docs/source/usage/chip_integration.md
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -60,7 +60,7 @@ The following inputs are provided to produce the final GDSII:

1. Padframe cfg file (provided by the user or generated by padring). [Here][6] is an example. Or a hardened chip_io.gds and chip_io.lef following [this][4].
2. Hardened lef & GDSII for the core module, generated [here](#hardening-the-core)
3. Top level netlist instantiating pads and core module (Could be provided by the user or generated by [topModuleGen])
3. Top level netlist instantiating pads and core module (Could be provided by the user or generated by topModuleGen)

[The interactive script for the IOs][4] does the following:
- Sources configurations.
Expand Down