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Enable 2 core s2idle#73

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DhruvaG2000 wants to merge 4 commits intoTexasInstruments:ti-masterfrom
DhruvaG2000:2core_s2idle
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Enable 2 core s2idle#73
DhruvaG2000 wants to merge 4 commits intoTexasInstruments:ti-masterfrom
DhruvaG2000:2core_s2idle

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Enable mode selection b/w deep sleep and rtc ddr mode with s2idle along with both the cores running.

@DhruvaG2000 DhruvaG2000 force-pushed the 2core_s2idle branch 2 times, most recently from 96de801 to dca9c43 Compare February 12, 2026 09:49
Enable mode selection b/w deep sleep and rtc ddr mode with s2idle
along with both the cores running.

Signed-off-by: Dhruva Gole <d-gole@ti.com>
Add an API for per-cpu gic restoration during suspend/resume

Signed-off-by: Dhruva Gole <d-gole@ti.com>
these helpers can be used across the PSCI driver to help
locally turn on/off cores without using the callbacks that are
used by the core PSCI fw.

Signed-off-by: Dhruva Gole <d-gole@ti.com>
Delay the core 1 pwr on sequence for s2idle after interrupt
(IPI) arrives from the other core signalling that it is
ready to bring back the other CPU

Signed-off-by: Dhruva Gole <d-gole@ti.com>
write_scr_el3(scr);
}

static int __maybe_unused am62l_loc_pwr_on(int core) {

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what is loc?

am62l_lpm_state = LPM_MODE_RTC_DDR;
} else if (power_state == LPM_STATE_SECONDARY_CPU_SUSPEND) {
/*
* Secondary CPU suspend marker. Only set a default if

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So id this race condition occurs, it always enter deepsleep or it get overwritten?


if (core == 1) {
INFO("!!GIC restore \n");
k3_gic_pcpu_restore();

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Why restore the gic from core 1?

core1_timeout--;
} while (core1_timeout > 0);

if (core1_timeout == 0)

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Why we need timeout? If the kernel is not excepting the core 1 to be on why we need to wake it up? Also, what happens is there is any interrupt that had affinity to core 1 has occurred? Can we have some info in this aspect as well

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2 participants