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Pre-schedule during Circuit Transpilation #132
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b84d731
implement pre-scheduling in circuit2graph
masa10-f 4eb76af
fix ruff error
masa10-f 3c2fc9d
optimize compile performance
masa10-f e0ea735
Merge branch 'master' into pre-schedule-for-circuit
masa10-f a569d63
Merge branch 'master' into pre-schedule-for-circuit
masa10-f 0676ee4
Fix tests for conditional _pauli_axis_cache initialization
masa10-f 8fc219e
fix type hint of graph state
masa10-f eef8f14
fix doc build
masa10-f 573a242
Unify circuit2graph and circuit2graph_with_preschedule
masa10-f f1de58f
Merge branch 'master' into pre-schedule-for-circuit
masa10-f 8cca8ce
add minimize space strategy in circuit2graph func
masa10-f e5dd8c4
remove self-loop
masa10-f 73c2862
remove the random circ generator
masa10-f d6e62ad
refactor circuit module and test
masa10-f 5b3bb29
fix pauliframe tet
masa10-f 7cf7067
update changelog
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Because
_pauli_axis_cacheis now only built whenparity_check_groupis non-empty, any call toPauliFrame.logical_observables_group()(used bystim_compilewhenlogical_observablesis provided) will hitself._pauli_axis_cache[node]and raise aKeyErrorifparity_check_groupwas omitted. This makesstim_compile(..., logical_observables=...)crash in the common case where callers don’t provide parity check groups, even though the API doesn’t require them.Useful? React with 👍 / 👎.