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Merge pull request #126 from marcin-golebiowski/master
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Various improvements
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@marcin-golebiowski
marcin-golebiowski authored Nov 18, 2019
2 parents 95a565b + eff32ff commit 3aaeb8c
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Showing 125 changed files with 1,106 additions and 1,722 deletions.
16 changes: 8 additions & 8 deletions src/SpiceSharp-Parser.sln
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Original file line number Diff line number Diff line change
Expand Up @@ -15,7 +15,7 @@ Project("{2150E333-8FDC-42A3-9474-1A3956D46DE8}") = "Tests", "Tests", "{CEDE104D
EndProject
Project("{9A19103F-16F7-4668-BE54-9A1E7A4F7556}") = "SpiceSharpParser.CodeAnalysis", "SpiceSharpParser.CodeAnalysis\SpiceSharpParser.CodeAnalysis.csproj", "{690C3742-17AD-46F6-A73D-CAE33C780523}"
EndProject
Project("{9A19103F-16F7-4668-BE54-9A1E7A4F7556}") = "SpiceSharpParser.PerformanceTests", "SpiceSharpParser.PerformanceTests\SpiceSharpParser.PerformanceTests.csproj", "{2F7A7389-F1C2-4824-9594-5E102CFACC88}"
Project("{FAE04EC0-301F-11D3-BF4B-00C04F79EFBC}") = "SpiceSharpParser.PerformanceTests", "SpiceSharpParser.PerformanceTests\SpiceSharpParser.PerformanceTests.csproj", "{53D996E7-8D58-49D0-97F6-71CAD49670A2}"
EndProject
Global
GlobalSection(SolutionConfigurationPlatforms) = preSolution
Expand Down Expand Up @@ -48,12 +48,12 @@ Global
{690C3742-17AD-46F6-A73D-CAE33C780523}.ERRORS|Any CPU.Build.0 = Release|Any CPU
{690C3742-17AD-46F6-A73D-CAE33C780523}.Release|Any CPU.ActiveCfg = Release|Any CPU
{690C3742-17AD-46F6-A73D-CAE33C780523}.Release|Any CPU.Build.0 = Release|Any CPU
{2F7A7389-F1C2-4824-9594-5E102CFACC88}.Debug|Any CPU.ActiveCfg = Debug|Any CPU
{2F7A7389-F1C2-4824-9594-5E102CFACC88}.Debug|Any CPU.Build.0 = Debug|Any CPU
{2F7A7389-F1C2-4824-9594-5E102CFACC88}.ERRORS|Any CPU.ActiveCfg = Debug|Any CPU
{2F7A7389-F1C2-4824-9594-5E102CFACC88}.ERRORS|Any CPU.Build.0 = Debug|Any CPU
{2F7A7389-F1C2-4824-9594-5E102CFACC88}.Release|Any CPU.ActiveCfg = Release|Any CPU
{2F7A7389-F1C2-4824-9594-5E102CFACC88}.Release|Any CPU.Build.0 = Release|Any CPU
{53D996E7-8D58-49D0-97F6-71CAD49670A2}.Debug|Any CPU.ActiveCfg = Debug|Any CPU
{53D996E7-8D58-49D0-97F6-71CAD49670A2}.Debug|Any CPU.Build.0 = Debug|Any CPU
{53D996E7-8D58-49D0-97F6-71CAD49670A2}.ERRORS|Any CPU.ActiveCfg = Debug|Any CPU
{53D996E7-8D58-49D0-97F6-71CAD49670A2}.ERRORS|Any CPU.Build.0 = Debug|Any CPU
{53D996E7-8D58-49D0-97F6-71CAD49670A2}.Release|Any CPU.ActiveCfg = Release|Any CPU
{53D996E7-8D58-49D0-97F6-71CAD49670A2}.Release|Any CPU.Build.0 = Release|Any CPU
EndGlobalSection
GlobalSection(SolutionProperties) = preSolution
HideSolutionNode = FALSE
Expand All @@ -62,7 +62,7 @@ Global
{94394567-BC35-43EE-92CB-31AC780305FE} = {CEDE104D-B6B3-433F-A8B3-C06086A4DD4E}
{57920E91-873B-4E66-B0EC-4CAC45007AA9} = {CEDE104D-B6B3-433F-A8B3-C06086A4DD4E}
{690C3742-17AD-46F6-A73D-CAE33C780523} = {A98DF2D4-CFE4-44F3-AD5C-21D6A0648EFD}
{2F7A7389-F1C2-4824-9594-5E102CFACC88} = {CEDE104D-B6B3-433F-A8B3-C06086A4DD4E}
{53D996E7-8D58-49D0-97F6-71CAD49670A2} = {CEDE104D-B6B3-433F-A8B3-C06086A4DD4E}
EndGlobalSection
GlobalSection(ExtensibilityGlobals) = postSolution
SolutionGuid = {F5DF7359-A6BE-4DB6-9200-CEFBAEBAD75E}
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8 changes: 2 additions & 6 deletions src/SpiceSharpParser.IntegrationTests/BaseTests.cs
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Expand Up @@ -10,19 +10,15 @@ namespace SpiceSharpParser.IntegrationTests
{
public class BaseTests
{
public BaseTests()
{
}

/// <summary>
/// Absolute tolerance used
/// </summary>
public double AbsTol = 1e-12;
private double AbsTol = 1e-12;

/// <summary>
/// Relative tolerance used
/// </summary>
public double RelTol = 1e-3;
private double RelTol = 1e-3;

public static SpiceNetlistReaderResult ParseNetlistInWorkingDirectory(string workingDirectory, params string[] lines)
{
Expand Down
3 changes: 2 additions & 1 deletion src/SpiceSharpParser.IntegrationTests/Common/LineContinuationTests.cs
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Original file line number Diff line number Diff line change
Expand Up @@ -156,7 +156,8 @@ public void When_ExpressionMultipleLine_Expect_Reference()
"Value format - Diode circuit",
"D1 1 0 1N914",
"V1 1 0 {0.0 +",
"+0.0}",
"+0.1 -",
"+ 0.1}",
".model 1N914 D(Is=2.52e-9",
" + Rs=0.568 N=1.752 Cjo=4e-12 M=0.4 tt=20e-9)",
".DC V1 -1 1.0 10e-3",
Expand Down
28 changes: 28 additions & 0 deletions src/SpiceSharpParser.IntegrationTests/Common/LineNumbersTests.cs
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Original file line number Diff line number Diff line change
@@ -1,4 +1,5 @@
using System.Linq;
using SpiceSharpParser.ModelReaders.Netlist.Spice.Exceptions;
using SpiceSharpParser.Models.Netlist.Spice.Objects;
using Xunit;

Expand Down Expand Up @@ -41,5 +42,32 @@ public void When_LineNumbers_Expect_Reference()
Assert.True(netlist.Statements[4].LineNumber == 8);
}

[Fact]
public void When_BugInExpression_Expect_Reference()
{
try
{
ParseNetlistToModel(
false,
true,
"Line numbers test circuit",
"* test1",
"* test2",
"",
"R1 OUT 0",
"",
" + {1/a}",
"* test 3",
"V1 OUT 0 0 $ test3.3 ; test4 $ test5",
".END");
}
catch (GeneralReaderException ex)
{
Assert.Equal(7, ex.LineNumber);
return;
}

Assert.False(true);
}
}
}
6 changes: 3 additions & 3 deletions src/SpiceSharpParser.IntegrationTests/Common/NodeNamesTests.cs
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Original file line number Diff line number Diff line change
Expand Up @@ -16,7 +16,7 @@ public void When_NodeNameHasUnderline_Expect_NoException()
".SAVE i(V1_a) v(1_a,0)",
".END");

var export = RunDCSimulation(netlist, "v(1_a,0)");
RunDCSimulation(netlist, "v(1_a,0)");
}

[Fact]
Expand All @@ -31,7 +31,7 @@ public void When_NodeNameHasPlusPrefix_Expect_NoException()
".SAVE i(V1_a) v(+1_a,0)",
".END");

var export = RunDCSimulation(netlist, "v(+1_a,0)");
RunDCSimulation(netlist, "v(+1_a,0)");
}

[Fact]
Expand All @@ -46,7 +46,7 @@ public void When_NodeNameHasMinusPrefix_Expect_NoException()
".SAVE i(V1_a) v(-1_a,0)",
".END");

var export = RunDCSimulation(netlist, "v(-1_a,0)");
RunDCSimulation(netlist, "v(-1_a,0)");
}
}
}
13 changes: 4 additions & 9 deletions src/SpiceSharpParser.IntegrationTests/DotStatements/McTests.cs
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Original file line number Diff line number Diff line change
@@ -1,3 +1,4 @@
using System;
using Xunit;

namespace SpiceSharpParser.IntegrationTests.DotStatements
Expand Down Expand Up @@ -47,7 +48,7 @@ public void McWithoutSaveVoltage()
var mcResult = result.MonteCarloResult;
var histPlot = mcResult.GetPlot(10);

Assert.Equal(1, histPlot.Bins.Count);
Assert.Single(histPlot.Bins);
Assert.Equal("V(1)", histPlot.XUnit);
}

Expand Down Expand Up @@ -95,14 +96,8 @@ public void McWrongFunction()
RunSimulations(result);

var mcResult = result.MonteCarloResult;
try
{
var histPlot = mcResult.GetPlot(10);
Assert.False(true, "There should be an exception");
}
catch
{
}

Assert.Throws<Exception>(() => mcResult.GetPlot(10));
}

[Fact]
Expand Down
12 changes: 6 additions & 6 deletions src/SpiceSharpParser.IntegrationTests/DotStatements/ParamTests.cs
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Expand Up @@ -19,7 +19,7 @@ public void ParamFunctionAdvanced()
".LET VOUT_db {add(decibels_plus_param(V(OUT),1), -0.5)}",
".END");

double[] export = RunOpSimulation(netlist, new string[] { "VOUT_db", "V(OUT)" });
double[] export = RunOpSimulation(netlist, "VOUT_db", "V(OUT)");

Assert.Equal(2.5, export[0]);
Assert.Equal(10, export[1]);
Expand All @@ -39,7 +39,7 @@ public void ParamVoltage()
".PARAM X = { V(1) }",
".END");

double[] export = RunOpSimulation(netlist, new string[] { "V(OUT)" });
double[] export = RunOpSimulation(netlist, new [] { "V(OUT)" });

Assert.Equal(10, export[0]);
}
Expand All @@ -58,9 +58,9 @@ public void ParamFunctionManyArguments()
".LET some_output_vector {somemagicfunction(1,2,3,4,5,6,7,8,9,10,11,12,13)}",
".END");

double[] export = RunOpSimulation(netlist, new string[] { "some_output_vector" });
double[] export = RunOpSimulation(netlist, new [] { "some_output_vector" });

Assert.Equal(13 * (13+1)/2, export[0]);
Assert.Equal(13 * (13 + 1) / 2.0, export[0]);
}

[Fact]
Expand All @@ -75,7 +75,7 @@ public void ParamFunctionWithoutArguments()
".PARAM somefunction() = {17}",
".END");

double[] export = RunOpSimulation(netlist, new string[] { "V(OUT)", "@R1[i]" });
double[] export = RunOpSimulation(netlist, "V(OUT)", "@R1[i]");

Assert.Equal(10.0, export[0]);
Assert.Equal(10.0 / 17.0, export[1]);
Expand Down Expand Up @@ -117,7 +117,7 @@ public void ParamFunctionFactRecursiveFunctionCleanSyntax()
".PARAM fact(x) = {x == 0 ? 1: x * fact(x -1)}",
".END");

double[] export = RunOpSimulation(netlist, new string[] { "V(OUT)", "@R1[i]" });
double[] export = RunOpSimulation(netlist, "V(OUT)", "@R1[i]");

Assert.Equal(60.0, export[0]);
Assert.Equal(60.0 / 6, export[1]);
Expand Down
5 changes: 2 additions & 3 deletions src/SpiceSharpParser.IntegrationTests/MultiThreading/ConcurrentSimulationsTests.cs
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Original file line number Diff line number Diff line change
@@ -1,4 +1,3 @@
using SpiceSharp.Simulations;
using System.Threading.Tasks;
using Xunit;

Expand All @@ -21,7 +20,7 @@ public void OPSweep()
".STEP X 1 10 1",
".END");

Parallel.ForEach<Simulation>(netlist.Simulations, new ParallelOptions() { MaxDegreeOfParallelism = 1 }, simulation => simulation.Run(netlist.Circuit));
Parallel.ForEach(netlist.Simulations, new ParallelOptions { MaxDegreeOfParallelism = 1 }, simulation => simulation.Run(netlist.Circuit));
}

[Fact]
Expand All @@ -38,7 +37,7 @@ public void OPMonteCarlo()
".MC 1000 OP power MAX",
".END");

Parallel.ForEach<Simulation>(result.Simulations, new ParallelOptions() { MaxDegreeOfParallelism = 8 }, simulation => simulation.Run(result.Circuit));
Parallel.ForEach(result.Simulations, new ParallelOptions { MaxDegreeOfParallelism = 8 }, simulation => simulation.Run(result.Circuit));
}
}
}
3 changes: 2 additions & 1 deletion src/SpiceSharpParser.IntegrationTests/Stochastic/DevTests.cs
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Original file line number Diff line number Diff line change
Expand Up @@ -286,7 +286,8 @@ public void When_DevNonZeroConstantWithGaussDistribution_Expect_NoException()
".DC V1 -1 1 0.1",
".SAVE i(V1)",
".END");
var export = RunDCSimulation(netlist, "i(V1)");

RunDCSimulation(netlist, "i(V1)");
}

[Fact]
Expand Down
14 changes: 7 additions & 7 deletions src/SpiceSharpParser.IntegrationTests/Stochastic/RandomTests.cs
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Original file line number Diff line number Diff line change
Expand Up @@ -23,7 +23,7 @@ public void Basic()
Assert.Equal(4, result.Exports.Count);
Assert.Equal(2, result.Simulations.Count);

var exports = RunSimulationsAndReturnExports(result);
RunSimulationsAndReturnExports(result);
}

[Fact]
Expand Down Expand Up @@ -85,8 +85,8 @@ public void OptionsSeed()

Assert.NotEqual(resultsSeed2224[0], resultsSeed2223[0]);

Assert.Equal(2223, parseResult2223.Seed);
Assert.Equal(2224, parseResult2224.Seed);
Assert.Equal(2223, parseResult2223?.Seed);
Assert.Equal(2224, parseResult2224?.Seed);
}

[Fact]
Expand Down Expand Up @@ -150,8 +150,8 @@ public void OptionsSeedOverridesParsingSeed()

Assert.NotEqual(resultsSeed2224[0], resultsSeed2223[0]);

Assert.Equal(2223, parseResult2223.Seed);
Assert.Equal(2224, parseResult2224.Seed);
Assert.Equal(2223, parseResult2223?.Seed);
Assert.Equal(2224, parseResult2224?.Seed);
}

[Fact]
Expand Down Expand Up @@ -215,8 +215,8 @@ public void ParsingSeed()

Assert.NotEqual(resultsSeed2224[0], resultsSeed2223[0]);

Assert.Equal(2223, parseResult2223.Seed);
Assert.Equal(2224, parseResult2224.Seed);
Assert.Equal(2223, parseResult2223?.Seed);
Assert.Equal(2224, parseResult2224?.Seed);
}
}
}
Expand Down
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