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Shreesh-Kulkarni committed Oct 23, 2023
1 parent db602e7 commit bdf1332
Showing 1 changed file with 90 additions and 146 deletions.
236 changes: 90 additions & 146 deletions comblogic/dsn
Original file line number Diff line number Diff line change
Expand Up @@ -7,158 +7,102 @@
:vpi_module "C:\iverilog\lib\ivl\vhdl_textio.vpi";
:vpi_module "C:\iverilog\lib\ivl\v2005_math.vpi";
:vpi_module "C:\iverilog\lib\ivl\va_math.vpi";
S_000001960ffbe950 .scope module, "adderstrtb" "adderstrtb" 2 3;
S_000002734fc16820 .scope module, "tb" "tb" 2 3;
.timescale -12 -12;
v0000019610021180_0 .var "a", 3 0;
v0000019610021e00_0 .var "b", 3 0;
v0000019610021220_0 .var "cin", 0 0;
v0000019610021360_0 .net "cout", 0 0, L_0000019610022e10; 1 drivers
v0000019610021680_0 .net "sum", 3 0, L_0000019610021fe0; 1 drivers
S_000001960ffbeae0 .scope module, "DUT" "adderstr" 2 8, 3 2 0, S_000001960ffbe950;
v000002734fc16be0_0 .var "inputs", 3 0;
v000002734fc1c0b0_0 .net "out", 1 0, L_000002734fc191f0; 1 drivers
S_000002734fc169b0 .scope module, "uut" "priority_encoder_4X2" 2 9, 3 2 0, S_000002734fc16820;
.timescale 0 0;
.port_info 0 /INPUT 4 "a";
.port_info 1 /INPUT 4 "b";
.port_info 2 /INPUT 1 "cin";
.port_info 3 /OUTPUT 4 "sum";
.port_info 4 /OUTPUT 1 "cout";
v0000019610021cc0_0 .net "a", 3 0, v0000019610021180_0; 1 drivers
v00000196100226c0_0 .net "b", 3 0, v0000019610021e00_0; 1 drivers
v0000019610020f00_0 .net "cin", 0 0, v0000019610021220_0; 1 drivers
v0000019610022440_0 .net "cout", 0 0, L_0000019610022e10; alias, 1 drivers
v0000019610021b80_0 .net "sum", 3 0, L_0000019610021fe0; alias, 1 drivers
v00000196100212c0_0 .net "t1", 0 0, L_00000196100237b0; 1 drivers
v0000019610021ea0_0 .net "t2", 0 0, L_0000019610022a90; 1 drivers
v0000019610022580_0 .net "t3", 0 0, L_0000019610022c50; 1 drivers
L_0000019610021f40 .part v0000019610021180_0, 0, 1;
L_0000019610021c20 .part v0000019610021e00_0, 0, 1;
L_00000196100223a0 .part v0000019610021180_0, 1, 1;
L_0000019610021400 .part v0000019610021e00_0, 1, 1;
L_0000019610022620 .part v0000019610021180_0, 2, 1;
L_0000019610021d60 .part v0000019610021e00_0, 2, 1;
L_0000019610020c80 .part v0000019610021180_0, 3, 1;
L_0000019610021540 .part v0000019610021e00_0, 3, 1;
L_0000019610021fe0 .concat8 [ 1 1 1 1], L_0000019610023740, L_00000196100234a0, L_00000196100229b0, L_0000019610023200;
S_000001960ffc87f0 .scope module, "fa1" "fagl" 3 8, 4 1 0, S_000001960ffbeae0;
.timescale 0 0;
.port_info 0 /INPUT 1 "a";
.port_info 1 /INPUT 1 "b";
.port_info 2 /INPUT 1 "cin";
.port_info 3 /OUTPUT 1 "sum";
.port_info 4 /OUTPUT 1 "cout";
L_000001960ffb8370 .functor XOR 1, L_0000019610021f40, L_0000019610021c20, C4<0>, C4<0>;
L_0000019610023740 .functor XOR 1, L_000001960ffb8370, v0000019610021220_0, C4<0>, C4<0>;
L_00000196100232e0 .functor AND 1, L_000001960ffb8370, v0000019610021220_0, C4<1>, C4<1>;
L_0000019610023510 .functor AND 1, L_0000019610021f40, L_0000019610021c20, C4<1>, C4<1>;
L_00000196100237b0 .functor OR 1, L_00000196100232e0, L_0000019610023510, C4<0>, C4<0>;
v000001960ffba8e0_0 .net "a", 0 0, L_0000019610021f40; 1 drivers
v000001960ffbb060_0 .net "b", 0 0, L_0000019610021c20; 1 drivers
v000001960ffbaa20_0 .net "cin", 0 0, v0000019610021220_0; alias, 1 drivers
v000001960ffbb2e0_0 .net "cout", 0 0, L_00000196100237b0; alias, 1 drivers
v000001960ffba840_0 .net "sum", 0 0, L_0000019610023740; 1 drivers
v000001960ffbb100_0 .net "t1", 0 0, L_000001960ffb8370; 1 drivers
v000001960ffbb240_0 .net "t2", 0 0, L_00000196100232e0; 1 drivers
v000001960ffba980_0 .net "t3", 0 0, L_0000019610023510; 1 drivers
S_000001960ffc8980 .scope module, "fa2" "fagl" 3 9, 4 1 0, S_000001960ffbeae0;
.timescale 0 0;
.port_info 0 /INPUT 1 "a";
.port_info 1 /INPUT 1 "b";
.port_info 2 /INPUT 1 "cin";
.port_info 3 /OUTPUT 1 "sum";
.port_info 4 /OUTPUT 1 "cout";
L_00000196100235f0 .functor XOR 1, L_00000196100223a0, L_0000019610021400, C4<0>, C4<0>;
L_00000196100234a0 .functor XOR 1, L_00000196100235f0, L_00000196100237b0, C4<0>, C4<0>;
L_0000019610023040 .functor AND 1, L_00000196100235f0, L_00000196100237b0, C4<1>, C4<1>;
L_0000019610022be0 .functor AND 1, L_00000196100223a0, L_0000019610021400, C4<1>, C4<1>;
L_0000019610022a90 .functor OR 1, L_0000019610023040, L_0000019610022be0, C4<0>, C4<0>;
v000001960ffba520_0 .net "a", 0 0, L_00000196100223a0; 1 drivers
v000001960ffbaac0_0 .net "b", 0 0, L_0000019610021400; 1 drivers
v000001960ffba5c0_0 .net "cin", 0 0, L_00000196100237b0; alias, 1 drivers
v000001960ffbac00_0 .net "cout", 0 0, L_0000019610022a90; alias, 1 drivers
v0000019610021040_0 .net "sum", 0 0, L_00000196100234a0; 1 drivers
v00000196100217c0_0 .net "t1", 0 0, L_00000196100235f0; 1 drivers
v00000196100224e0_0 .net "t2", 0 0, L_0000019610023040; 1 drivers
v0000019610021720_0 .net "t3", 0 0, L_0000019610022be0; 1 drivers
S_00000196100f6670 .scope module, "fa3" "fagl" 3 10, 4 1 0, S_000001960ffbeae0;
.timescale 0 0;
.port_info 0 /INPUT 1 "a";
.port_info 1 /INPUT 1 "b";
.port_info 2 /INPUT 1 "cin";
.port_info 3 /OUTPUT 1 "sum";
.port_info 4 /OUTPUT 1 "cout";
L_0000019610022a20 .functor XOR 1, L_0000019610022620, L_0000019610021d60, C4<0>, C4<0>;
L_00000196100229b0 .functor XOR 1, L_0000019610022a20, L_0000019610022a90, C4<0>, C4<0>;
L_0000019610022cc0 .functor AND 1, L_0000019610022a20, L_0000019610022a90, C4<1>, C4<1>;
L_0000019610022940 .functor AND 1, L_0000019610022620, L_0000019610021d60, C4<1>, C4<1>;
L_0000019610022c50 .functor OR 1, L_0000019610022cc0, L_0000019610022940, C4<0>, C4<0>;
v0000019610022760_0 .net "a", 0 0, L_0000019610022620; 1 drivers
v0000019610021860_0 .net "b", 0 0, L_0000019610021d60; 1 drivers
v0000019610021900_0 .net "cin", 0 0, L_0000019610022a90; alias, 1 drivers
v00000196100219a0_0 .net "cout", 0 0, L_0000019610022c50; alias, 1 drivers
v00000196100214a0_0 .net "sum", 0 0, L_00000196100229b0; 1 drivers
v0000019610020dc0_0 .net "t1", 0 0, L_0000019610022a20; 1 drivers
v0000019610022260_0 .net "t2", 0 0, L_0000019610022cc0; 1 drivers
v0000019610020d20_0 .net "t3", 0 0, L_0000019610022940; 1 drivers
S_00000196100f6800 .scope module, "fa4" "fagl" 3 11, 4 1 0, S_000001960ffbeae0;
.timescale 0 0;
.port_info 0 /INPUT 1 "a";
.port_info 1 /INPUT 1 "b";
.port_info 2 /INPUT 1 "cin";
.port_info 3 /OUTPUT 1 "sum";
.port_info 4 /OUTPUT 1 "cout";
L_0000019610022b00 .functor XOR 1, L_0000019610020c80, L_0000019610021540, C4<0>, C4<0>;
L_0000019610023200 .functor XOR 1, L_0000019610022b00, L_0000019610022c50, C4<0>, C4<0>;
L_0000019610022e80 .functor AND 1, L_0000019610022b00, L_0000019610022c50, C4<1>, C4<1>;
L_00000196100228d0 .functor AND 1, L_0000019610020c80, L_0000019610021540, C4<1>, C4<1>;
L_0000019610022e10 .functor OR 1, L_0000019610022e80, L_00000196100228d0, C4<0>, C4<0>;
v00000196100210e0_0 .net "a", 0 0, L_0000019610020c80; 1 drivers
v0000019610020a00_0 .net "b", 0 0, L_0000019610021540; 1 drivers
v0000019610020e60_0 .net "cin", 0 0, L_0000019610022c50; alias, 1 drivers
v0000019610020aa0_0 .net "cout", 0 0, L_0000019610022e10; alias, 1 drivers
v00000196100215e0_0 .net "sum", 0 0, L_0000019610023200; 1 drivers
v0000019610020be0_0 .net "t1", 0 0, L_0000019610022b00; 1 drivers
v0000019610021a40_0 .net "t2", 0 0, L_0000019610022e80; 1 drivers
v0000019610021ae0_0 .net "t3", 0 0, L_00000196100228d0; 1 drivers
.scope S_000001960ffbe950;
.port_info 0 /INPUT 4 "inputs";
.port_info 1 /OUTPUT 2 "out";
L_000002734fc191f0 .functor BUFZ 2, v000002734fc17010_0, C4<00>, C4<00>, C4<00>;
v000002734fc17010_0 .var "encoded_output", 1 0;
v000002734fc19150_0 .net "inputs", 3 0, v000002734fc16be0_0; 1 drivers
v000002734fc16b40_0 .net "out", 1 0, L_000002734fc191f0; alias, 1 drivers
E_000002734fc1c570 .event anyedge, v000002734fc19150_0;
.scope S_000002734fc169b0;
T_0 ;
%vpi_call 2 11 "$dumpfile", "adderstrtb.vcd" {0 0 0};
%vpi_call 2 12 "$dumpvars", 32'sb00000000000000000000000000000000, S_000001960ffbe950 {0 0 0};
%vpi_call 2 13 "$monitor", $time, " A=%b B=%b Cin=%b Sum=%b Cout=%b", v0000019610021180_0, v0000019610021e00_0, v0000019610021220_0, v0000019610021680_0, v0000019610021360_0 {0 0 0};
%delay 5, 0;
%pushi/vec4 10, 0, 4;
%store/vec4 v0000019610021180_0, 0, 4;
%pushi/vec4 12, 0, 4;
%store/vec4 v0000019610021e00_0, 0, 4;
%pushi/vec4 0, 0, 1;
%store/vec4 v0000019610021220_0, 0, 1;
%delay 5, 0;
%wait E_000002734fc1c570;
%load/vec4 v000002734fc19150_0;
%dup/vec4;
%pushi/vec4 0, 0, 4;
%cmp/x;
%jmp/1 T_0.0, 4;
%dup/vec4;
%pushi/vec4 15, 7, 4;
%cmp/x;
%jmp/1 T_0.1, 4;
%dup/vec4;
%pushi/vec4 7, 3, 4;
%cmp/x;
%jmp/1 T_0.2, 4;
%dup/vec4;
%pushi/vec4 3, 1, 4;
%cmp/x;
%jmp/1 T_0.3, 4;
%dup/vec4;
%pushi/vec4 1, 0, 4;
%cmp/x;
%jmp/1 T_0.4, 4;
%jmp T_0.5;
T_0.0 ;
%pushi/vec4 3, 3, 2;
%store/vec4 v000002734fc17010_0, 0, 2;
%jmp T_0.5;
T_0.1 ;
%pushi/vec4 3, 0, 2;
%store/vec4 v000002734fc17010_0, 0, 2;
%jmp T_0.5;
T_0.2 ;
%pushi/vec4 2, 0, 2;
%store/vec4 v000002734fc17010_0, 0, 2;
%jmp T_0.5;
T_0.3 ;
%pushi/vec4 1, 0, 2;
%store/vec4 v000002734fc17010_0, 0, 2;
%jmp T_0.5;
T_0.4 ;
%pushi/vec4 0, 0, 2;
%store/vec4 v000002734fc17010_0, 0, 2;
%jmp T_0.5;
T_0.5 ;
%pop/vec4 1;
%jmp T_0;
.thread T_0, $push;
.scope S_000002734fc16820;
T_1 ;
%vpi_call 2 15 "$dumpfile", "dump.vcd" {0 0 0};
%vpi_call 2 16 "$dumpvars" {0 0 0};
%pushi/vec4 0, 0, 4;
%store/vec4 v000002734fc16be0_0, 0, 4;
%delay 10, 0;
%pushi/vec4 8, 0, 4;
%store/vec4 v000002734fc16be0_0, 0, 4;
%delay 10, 0;
%pushi/vec4 4, 0, 4;
%store/vec4 v000002734fc16be0_0, 0, 4;
%delay 10, 0;
%pushi/vec4 2, 0, 4;
%store/vec4 v0000019610021180_0, 0, 4;
%pushi/vec4 14, 0, 4;
%store/vec4 v0000019610021e00_0, 0, 4;
%pushi/vec4 1, 0, 1;
%store/vec4 v0000019610021220_0, 0, 1;
%delay 5, 0;
%pushi/vec4 15, 0, 4;
%store/vec4 v0000019610021180_0, 0, 4;
%store/vec4 v000002734fc16be0_0, 0, 4;
%delay 10, 0;
%pushi/vec4 1, 0, 4;
%store/vec4 v000002734fc16be0_0, 0, 4;
%delay 10, 0;
%pushi/vec4 12, 0, 4;
%store/vec4 v000002734fc16be0_0, 0, 4;
%delay 10, 0;
%pushi/vec4 6, 0, 4;
%store/vec4 v000002734fc16be0_0, 0, 4;
%delay 10, 0;
%pushi/vec4 15, 0, 4;
%store/vec4 v0000019610021e00_0, 0, 4;
%pushi/vec4 0, 0, 1;
%store/vec4 v0000019610021220_0, 0, 1;
%delay 5, 0;
%pushi/vec4 9, 0, 4;
%store/vec4 v0000019610021180_0, 0, 4;
%pushi/vec4 13, 0, 4;
%store/vec4 v0000019610021e00_0, 0, 4;
%pushi/vec4 1, 0, 1;
%store/vec4 v0000019610021220_0, 0, 1;
%delay 5, 0;
%vpi_call 2 18 "$finish" {0 0 0};
%store/vec4 v000002734fc16be0_0, 0, 4;
%delay 10, 0;
%vpi_call 2 42 "$finish" {0 0 0};
%end;
.thread T_0;
.thread T_1;
# The file index is used to find the file name in the following table.
:file_names 5;
:file_names 4;
"N/A";
"<interactive>";
"adderstrtb.v";
"./adderstr.v";
"./fagl.v";
"prioritytb.v";
"./priority.v";

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