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feat: arm64: mmu: auto-sensing of best paging stride #9733

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merged 1 commit into from
Dec 14, 2024

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@polarvid polarvid commented Dec 2, 2024

拉取/合并请求描述:(PR description)

[

为什么提交这份PR (why to submit this PR)

Improves the memory mapping process by dynamically selecting the optimal paging stride (4K or 2M) based on virtual address alignment and mapping size. This eliminates the need for upfront stride determination, enhancing flexibility and maintainability in memory management.

你的解决方案是什么 (what is your solution)

Changes:

  • Replaced fixed stride selection logic with a dynamic decision loop.
  • Removed npages calculation and replaced with remaining_sz to track unprocessed memory size.
  • Added assertions to ensure size is properly aligned to the smallest page size.
  • Adjusted loop to dynamically determine and apply the appropriate stride (4K or 2M) for each mapping iteration.
  • Updated virtual and physical address increments to use the dynamically selected stride.

请提供验证的bsp和config (provide the config and bsp)

  • BSP:
  • .config:
  • action:

]

当前拉取/合并请求的状态 Intent for your PR

必须选择一项 Choose one (Mandatory):

  • 本拉取/合并请求是一个草稿版本 This PR is for a code-review and is intended to get feedback
  • 本拉取/合并请求是一个成熟版本 This PR is mature, and ready to be integrated into the repo

代码质量 Code Quality:

我在这个拉取/合并请求中已经考虑了 As part of this pull request, I've considered the following:

  • 已经仔细查看过代码改动的对比 Already check the difference between PR and old code
  • 代码风格正确,包括缩进空格,命名及其他风格 Style guide is adhered to, including spacing, naming and other styles
  • 没有垃圾代码,代码尽量精简,不包含#if 0代码,不包含已经被注释了的代码 All redundant code is removed and cleaned up
  • 所有变更均有原因及合理的,并且不会影响到其他软件组件代码或BSP All modifications are justified and not affect other components or BSP
  • 对难懂代码均提供对应的注释 I've commented appropriately where code is tricky
  • 代码是高质量的 Code in this PR is of high quality
  • 已经使用formatting 等源码格式化工具确保格式符合RT-Thread代码规范 This PR complies with RT-Thread code specification
  • 如果是新增bsp, 已经添加ci检查到.github/workflows/bsp_buildings.yml 详细请参考链接BSP自查

Improves the memory mapping process by dynamically selecting the optimal
paging stride (4K or 2M) based on virtual address alignment and mapping
size. This eliminates the need for upfront stride determination, enhancing
flexibility and maintainability in memory management.

Changes:
- Replaced fixed stride selection logic with a dynamic decision loop.
- Removed `npages` calculation and replaced with `remaining_sz` to track
  unprocessed memory size.
- Added assertions to ensure `size` is properly aligned to the smallest
  page size.
- Adjusted loop to dynamically determine and apply the appropriate stride
  (4K or 2M) for each mapping iteration.
- Updated virtual and physical address increments to use the dynamically
  selected stride.

Signed-off-by: Shell <smokewood@qq.com>
@github-actions github-actions bot added Arch: ARM/AArch64 BSP related with arm libcpu labels Dec 2, 2024
@polarvid polarvid marked this pull request as ready for review December 2, 2024 10:46
@BernardXiong BernardXiong added the +1 Agree +1 label Dec 13, 2024
@mysterywolf mysterywolf merged commit 7ff75e2 into RT-Thread:master Dec 14, 2024
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3 participants