Skip to content

Commit c352c2b

Browse files
BernardXiongBernardXiong
authored
Merge pull request #2844 from ErnestChen1/drv_crypto
[drivers][crypto]add device CRC/RNG
2 parents badac51 + 9333bba commit c352c2b

File tree

48 files changed

+475
-33
lines changed

Some content is hidden

Large Commits have some content hidden by default. Use the searchbox below for content that may be hidden.

48 files changed

+475
-33
lines changed

‎bsp/stm32/libraries/HAL_Drivers/Kconfig

Lines changed: 23 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,23 @@
1+
2+
config BSP_USING_CRC
3+
bool "Enable CRC (CRC-32 0x04C11DB7 Polynomial)"
4+
select RT_USING_HWCRYPTO
5+
select RT_HWCRYPTO_USING_CRC
6+
# "Crypto device frame dose not support above 8-bits granularity"
7+
# "Reserve progress, running well, about 32-bits granularity, such as stm32f1, stm32f4"
8+
depends on (SOC_SERIES_STM32L4 || SOC_SERIES_STM32F0 || SOC_SERIES_STM32F7 || SOC_SERIES_STM32H7)
9+
default n
10+
11+
config BSP_USING_RNG
12+
bool "Enable RNG (Random Number Generator)"
13+
select RT_USING_HWCRYPTO
14+
select RT_HWCRYPTO_USING_RNG
15+
depends on (SOC_SERIES_STM32L4 || SOC_SERIES_STM32F4 || SOC_SERIES_STM32F7 || \
16+
SOC_SERIES_STM32H7)
17+
default n
18+
19+
config BSP_USING_UDID
20+
bool "Enable UDID (Unique Device Identifier)"
21+
select RT_USING_HWCRYPTO
22+
default n
23+

‎bsp/stm32/libraries/HAL_Drivers/SConscript

Lines changed: 4 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -72,7 +72,10 @@ if GetDepend(['BSP_USING_ON_CHIP_FLASH', 'SOC_SERIES_STM32F7']):
7272

7373
if GetDepend(['BSP_USING_ON_CHIP_FLASH', 'SOC_SERIES_STM32L4']):
7474
src += ['drv_flash/drv_flash_l4.c']
75-
75+
76+
if GetDepend('RT_USING_HWCRYPTO'):
77+
src += ['drv_crypto.c']
78+
7679
if GetDepend(['BSP_USING_WDT']):
7780
src += ['drv_wdt.c']
7881

‎bsp/stm32/libraries/HAL_Drivers/drv_crypto.c

Lines changed: 327 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,327 @@
1+
/*
2+
* Copyright (c) 2019 Winner Microelectronics Co., Ltd.
3+
*
4+
* SPDX-License-Identifier: Apache-2.0
5+
*
6+
* Change Logs:
7+
* Date Author Notes
8+
* 2019-07-10 Ernest 1st version
9+
*/
10+
11+
#include <rtthread.h>
12+
#include <rtdevice.h>
13+
#include <stdlib.h>
14+
#include <string.h>
15+
#include "drv_crypto.h"
16+
#include "board.h"
17+
18+
struct stm32_hwcrypto_device
19+
{
20+
struct rt_hwcrypto_device dev;
21+
struct rt_mutex mutex;
22+
};
23+
24+
#if defined(BSP_USING_CRC)
25+
26+
struct hash_ctx_des
27+
{
28+
CRC_HandleTypeDef contex;
29+
};
30+
31+
#if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32H7) || defined(SOC_SERIES_STM32F7)
32+
static struct hwcrypto_crc_cfg crc_backup_cfg;
33+
34+
static int reverse_bit(rt_uint32_t n)
35+
{
36+
n = ((n >> 1) & 0x55555555) | ((n << 1) & 0xaaaaaaaa);
37+
n = ((n >> 2) & 0x33333333) | ((n << 2) & 0xcccccccc);
38+
n = ((n >> 4) & 0x0f0f0f0f) | ((n << 4) & 0xf0f0f0f0);
39+
n = ((n >> 8) & 0x00ff00ff) | ((n << 8) & 0xff00ff00);
40+
n = ((n >> 16) & 0x0000ffff) | ((n << 16) & 0xffff0000);
41+
42+
return n;
43+
}
44+
#endif /* defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32H7) || defined(SOC_SERIES_STM32F7) */
45+
46+
static rt_uint32_t _crc_update(struct hwcrypto_crc *ctx, const rt_uint8_t *in, rt_size_t length)
47+
{
48+
rt_uint32_t result = 0;
49+
struct stm32_hwcrypto_device *stm32_hw_dev = (struct stm32_hwcrypto_device *)ctx->parent.device->user_data;
50+
51+
#if defined(SOC_SERIES_STM32L4)|| defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32H7) || defined(SOC_SERIES_STM32F7)
52+
CRC_HandleTypeDef *HW_TypeDef = (CRC_HandleTypeDef *)(ctx->parent.contex);
53+
#endif
54+
55+
rt_mutex_take(&stm32_hw_dev->mutex, RT_WAITING_FOREVER);
56+
#if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32H7) || defined(SOC_SERIES_STM32F7)
57+
if (memcmp(&crc_backup_cfg, &ctx->crc_cfg, sizeof(struct hwcrypto_crc_cfg)) != 0)
58+
{
59+
if (HW_TypeDef->Init.DefaultPolynomialUse == DEFAULT_POLYNOMIAL_DISABLE)
60+
{
61+
HW_TypeDef->Init.GeneratingPolynomial = ctx ->crc_cfg.poly;
62+
}
63+
else
64+
{
65+
HW_TypeDef->Init.GeneratingPolynomial = DEFAULT_CRC32_POLY;
66+
}
67+
68+
switch (ctx ->crc_cfg.flags)
69+
{
70+
case 0:
71+
HW_TypeDef->Init.InputDataInversionMode = CRC_INPUTDATA_INVERSION_NONE;
72+
HW_TypeDef->Init.OutputDataInversionMode = CRC_OUTPUTDATA_INVERSION_DISABLE;
73+
break;
74+
case CRC_FLAG_REFIN:
75+
HW_TypeDef->Init.InputDataInversionMode = CRC_INPUTDATA_INVERSION_BYTE;
76+
break;
77+
case CRC_FLAG_REFOUT:
78+
HW_TypeDef->Init.OutputDataInversionMode = CRC_OUTPUTDATA_INVERSION_ENABLE;
79+
break;
80+
case CRC_FLAG_REFIN|CRC_FLAG_REFOUT:
81+
HW_TypeDef->Init.InputDataInversionMode = CRC_INPUTDATA_INVERSION_BYTE;
82+
HW_TypeDef->Init.OutputDataInversionMode = CRC_OUTPUTDATA_INVERSION_ENABLE;
83+
break;
84+
default :
85+
goto _exit;
86+
}
87+
88+
HW_TypeDef->Init.CRCLength = ctx ->crc_cfg.width;
89+
if (HW_TypeDef->Init.DefaultInitValueUse == DEFAULT_INIT_VALUE_DISABLE)
90+
{
91+
HW_TypeDef->Init.InitValue = ctx ->crc_cfg.last_val;
92+
}
93+
94+
if (HAL_CRC_Init(HW_TypeDef) != HAL_OK)
95+
{
96+
goto _exit;
97+
}
98+
memcpy(&crc_backup_cfg, &ctx->crc_cfg, sizeof(struct hwcrypto_crc_cfg));
99+
}
100+
101+
if (HAL_CRC_STATE_READY != HAL_CRC_GetState(HW_TypeDef))
102+
{
103+
goto _exit;
104+
}
105+
#else
106+
if (ctx->crc_cfg.flags != 0 || ctx->crc_cfg.last_val != 0xFFFFFFFF || ctx->crc_cfg.xorout != 0 || length % 4 != 0)
107+
{
108+
goto _exit;
109+
}
110+
length /= 4;
111+
#endif /* defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32H7) || defined(SOC_SERIES_STM32F7) */
112+
113+
result = HAL_CRC_Accumulate(ctx->parent.contex, (rt_uint32_t *)in, length);
114+
115+
#if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32H7) || defined(SOC_SERIES_STM32F7)
116+
if (HW_TypeDef->Init.OutputDataInversionMode)
117+
{
118+
ctx ->crc_cfg.last_val = reverse_bit(result);
119+
}
120+
else
121+
{
122+
ctx ->crc_cfg.last_val = result;
123+
}
124+
crc_backup_cfg.last_val = ctx ->crc_cfg.last_val;
125+
result = (result ? result ^ (ctx ->crc_cfg.xorout) : result);
126+
#endif /* defined(SOC_SERIES_STM32L4)|| defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32H7) || defined(SOC_SERIES_STM32F7) */
127+
128+
_exit:
129+
rt_mutex_release(&stm32_hw_dev->mutex);
130+
131+
return result;
132+
}
133+
134+
static const struct hwcrypto_crc_ops crc_ops =
135+
{
136+
.update = _crc_update,
137+
};
138+
#endif /* BSP_USING_CRC */
139+
140+
#if defined(BSP_USING_RNG)
141+
static rt_uint32_t _rng_rand(struct hwcrypto_rng *ctx)
142+
{
143+
rt_uint32_t gen_random = 0;
144+
145+
RNG_HandleTypeDef *HW_TypeDef = (RNG_HandleTypeDef *)(ctx->parent.contex);
146+
147+
if (HAL_OK == HAL_RNG_GenerateRandomNumber(HW_TypeDef, &gen_random))
148+
{
149+
return gen_random ;
150+
}
151+
152+
return 0;
153+
}
154+
155+
static const struct hwcrypto_rng_ops rng_ops =
156+
{
157+
.update = _rng_rand,
158+
};
159+
#endif /* BSP_USING_RNG */
160+
161+
static rt_err_t _crypto_create(struct rt_hwcrypto_ctx *ctx)
162+
{
163+
rt_err_t res = RT_EOK;
164+
165+
switch (ctx->type & HWCRYPTO_MAIN_TYPE_MASK)
166+
{
167+
#if defined(BSP_USING_RNG)
168+
case HWCRYPTO_TYPE_RNG:
169+
{
170+
RNG_HandleTypeDef *hrng = rt_calloc(1, sizeof(RNG_HandleTypeDef));
171+
172+
hrng->Instance = RNG;
173+
HAL_RNG_Init(hrng);
174+
ctx->contex = hrng;
175+
((struct hwcrypto_rng *)ctx)->ops = &rng_ops;
176+
177+
break;
178+
}
179+
#endif /* BSP_USING_RNG */
180+
181+
#if defined(BSP_USING_CRC)
182+
case HWCRYPTO_TYPE_CRC:
183+
{
184+
CRC_HandleTypeDef *hcrc = rt_calloc(1, sizeof(CRC_HandleTypeDef));
185+
if (RT_NULL == hcrc)
186+
{
187+
res = -RT_ERROR;
188+
break;
189+
}
190+
191+
hcrc->Instance = CRC;
192+
#if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32H7) || defined(SOC_SERIES_STM32F7)
193+
hcrc->Init.DefaultPolynomialUse = DEFAULT_POLYNOMIAL_ENABLE;
194+
hcrc->Init.DefaultInitValueUse = DEFAULT_INIT_VALUE_DISABLE;
195+
hcrc->Init.InputDataInversionMode = CRC_INPUTDATA_INVERSION_BYTE;
196+
hcrc->Init.OutputDataInversionMode = CRC_OUTPUTDATA_INVERSION_ENABLE;
197+
hcrc->InputDataFormat = CRC_INPUTDATA_FORMAT_BYTES;
198+
#else
199+
if (HAL_CRC_Init(hcrc) != HAL_OK)
200+
{
201+
res = -RT_ERROR;
202+
}
203+
#endif /* defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32H7) || defined(SOC_SERIES_STM32F7) */
204+
ctx->contex = hcrc;
205+
((struct hwcrypto_crc *)ctx)->ops = &crc_ops;
206+
break;
207+
}
208+
#endif /* BSP_USING_CRC */
209+
default:
210+
res = -RT_ERROR;
211+
break;
212+
}
213+
return res;
214+
}
215+
216+
static void _crypto_destroy(struct rt_hwcrypto_ctx *ctx)
217+
{
218+
switch (ctx->type & HWCRYPTO_MAIN_TYPE_MASK)
219+
{
220+
#if defined(BSP_USING_RNG)
221+
case HWCRYPTO_TYPE_RNG:
222+
break;
223+
#endif /* BSP_USING_RNG */
224+
225+
#if defined(BSP_USING_CRC)
226+
case HWCRYPTO_TYPE_CRC:
227+
__HAL_CRC_DR_RESET((CRC_HandleTypeDef *)ctx-> contex);
228+
HAL_CRC_DeInit((CRC_HandleTypeDef *)(ctx->contex));
229+
break;
230+
#endif /* BSP_USING_CRC */
231+
default:
232+
break;
233+
}
234+
235+
rt_free(ctx->contex);
236+
}
237+
238+
static rt_err_t _crypto_clone(struct rt_hwcrypto_ctx *des, const struct rt_hwcrypto_ctx *src)
239+
{
240+
rt_err_t res = RT_EOK;
241+
242+
switch (src->type & HWCRYPTO_MAIN_TYPE_MASK)
243+
{
244+
#if defined(BSP_USING_RNG)
245+
case HWCRYPTO_TYPE_RNG:
246+
if (des->contex && src->contex)
247+
{
248+
rt_memcpy(des->contex, src->contex, sizeof(struct hash_ctx_des));
249+
}
250+
break;
251+
#endif /* BSP_USING_RNG */
252+
253+
#if defined(BSP_USING_CRC)
254+
case HWCRYPTO_TYPE_CRC:
255+
if (des->contex && src->contex)
256+
{
257+
rt_memcpy(des->contex, src->contex, sizeof(struct hash_ctx_des));
258+
}
259+
break;
260+
#endif /* BSP_USING_CRC */
261+
default:
262+
res = -RT_ERROR;
263+
break;
264+
}
265+
return res;
266+
}
267+
268+
static void _crypto_reset(struct rt_hwcrypto_ctx *ctx)
269+
{
270+
switch (ctx->type & HWCRYPTO_MAIN_TYPE_MASK)
271+
{
272+
#if defined(BSP_USING_RNG)
273+
case HWCRYPTO_TYPE_RNG:
274+
break;
275+
#endif /* BSP_USING_RNG */
276+
277+
#if defined(BSP_USING_CRC)
278+
case HWCRYPTO_TYPE_CRC:
279+
__HAL_CRC_DR_RESET((CRC_HandleTypeDef *)ctx-> contex);
280+
break;
281+
#endif /* BSP_USING_CRC */
282+
default:
283+
break;
284+
}
285+
}
286+
287+
static const struct rt_hwcrypto_ops _ops =
288+
{
289+
.create = _crypto_create,
290+
.destroy = _crypto_destroy,
291+
.copy = _crypto_clone,
292+
.reset = _crypto_reset,
293+
};
294+
295+
int stm32_hw_crypto_device_init(void)
296+
{
297+
static struct stm32_hwcrypto_device _crypto_dev;
298+
rt_uint32_t cpuid[3] = {0};
299+
300+
_crypto_dev.dev.ops = &_ops;
301+
#if defined(BSP_USING_UDID)
302+
303+
#if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32F7)
304+
cpuid[0] = HAL_GetUIDw0();
305+
cpuid[1] = HAL_GetUIDw1();
306+
#elif defined(SOC_SERIES_STM32F1)
307+
HAL_GetUID(cpuid);
308+
#elif defined(SOC_SERIES_STM32H7)
309+
cpuid[0] = HAL_GetREVID();
310+
cpuid[1] = HAL_GetDEVID();
311+
#endif
312+
313+
#endif /* BSP_USING_UDID */
314+
315+
_crypto_dev.dev.id = 0;
316+
rt_memcpy(&_crypto_dev.dev.id, cpuid, 8);
317+
318+
_crypto_dev.dev.user_data = &_crypto_dev;
319+
320+
if (rt_hwcrypto_register(&_crypto_dev.dev, RT_HWCRYPTO_DEFAULT_NAME) != RT_EOK)
321+
{
322+
return -1;
323+
}
324+
rt_mutex_init(&_crypto_dev.mutex, RT_HWCRYPTO_DEFAULT_NAME, RT_IPC_FLAG_FIFO);
325+
return 0;
326+
}
327+
INIT_DEVICE_EXPORT(stm32_hw_crypto_device_init);

‎bsp/stm32/libraries/HAL_Drivers/drv_crypto.h

Lines changed: 16 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,16 @@
1+
/*
2+
* Copyright (c) 2019 Winner Microelectronics Co., Ltd.
3+
*
4+
* SPDX-License-Identifier: Apache-2.0
5+
*
6+
* Change Logs:
7+
* Date Author Notes
8+
* 2019-07-10 Ernest 1st version
9+
*/
10+
11+
#ifndef __DRV_CRYPTO_H__
12+
#define __DRV_CRYPTO_H__
13+
14+
int l4_hw_crypto_device_init(void);
15+
16+
#endif /* __DRV_CRYPTO_H__ */

‎bsp/stm32/libraries/templates/stm32f0xx/board/Kconfig

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -68,7 +68,8 @@ menu "On-chip Peripheral Drivers"
6868
range 1 216
6969
default 16
7070
endif
71-
71+
source "../libraries/HAL_Drivers/Kconfig"
72+
7273
endmenu
7374

7475
menu "Board extended module Drivers"

0 commit comments

Comments
 (0)