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Sync upstream (#6793)
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Co-authored-by: Wayne Lin <wclin@nuvoton.com>
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wosayttn and ttnwosay authored Dec 29, 2022
1 parent 882a0af commit 0d1c709
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Showing 203 changed files with 11,987 additions and 34,479 deletions.
1 change: 1 addition & 0 deletions bsp/nuvoton/README.md
Original file line number Diff line number Diff line change
Expand Up @@ -14,3 +14,4 @@ Current supported BSP shown in below table:
| NuMaker-M467HJ | CORTEX-M4 | [numaker-m467hj](numaker-m467hj) |
| NuMaker-IoT-M467 | CORTEX-M4 | [numaker-iot-m467](numaker-iot-m467) |
| NuMaker-HMI-MA35D1 | CORTEX-A35, CORTEX-M4 | [numaker-hmi-ma35d1](numaker-hmi-ma35d1), [ma35-rtp](ma35-rtp) |
| NuMaker-IOT-MA35D1 | CORTEX-A35, CORTEX-M4 | [numaker-iot-ma35d1](numaker-iot-ma35d1), [ma35-rtp](ma35-rtp) |
12 changes: 0 additions & 12 deletions bsp/nuvoton/libraries/m460/rtt_port/drv_pdma.c
Original file line number Diff line number Diff line change
Expand Up @@ -154,12 +154,6 @@ static const nu_pdma_periph_ctl_t g_nu_pdma_peripheral_ctl_pool[ ] =
{ PDMA_SPI9_TX, eMemCtl_SrcInc_DstFix },
{ PDMA_SPI10_TX, eMemCtl_SrcInc_DstFix },

{ PDMA_I2C0_TX, eMemCtl_SrcInc_DstFix },
{ PDMA_I2C1_TX, eMemCtl_SrcInc_DstFix },
{ PDMA_I2C2_TX, eMemCtl_SrcInc_DstFix },
{ PDMA_I2C3_TX, eMemCtl_SrcInc_DstFix },
{ PDMA_I2C4_TX, eMemCtl_SrcInc_DstFix },

{ PDMA_I2S0_TX, eMemCtl_SrcInc_DstFix },
{ PDMA_I2S1_TX, eMemCtl_SrcInc_DstFix },

Expand Down Expand Up @@ -215,12 +209,6 @@ static const nu_pdma_periph_ctl_t g_nu_pdma_peripheral_ctl_pool[ ] =
{ PDMA_EPWM1_P2_RX, eMemCtl_SrcFix_DstInc },
{ PDMA_EPWM1_P3_RX, eMemCtl_SrcFix_DstInc },

{ PDMA_I2C0_RX, eMemCtl_SrcFix_DstInc },
{ PDMA_I2C1_RX, eMemCtl_SrcFix_DstInc },
{ PDMA_I2C2_RX, eMemCtl_SrcFix_DstInc },
{ PDMA_I2C3_RX, eMemCtl_SrcFix_DstInc },
{ PDMA_I2C4_RX, eMemCtl_SrcFix_DstInc },

{ PDMA_I2S0_RX, eMemCtl_SrcFix_DstInc },
{ PDMA_I2S1_RX, eMemCtl_SrcFix_DstInc },

Expand Down
92 changes: 46 additions & 46 deletions bsp/nuvoton/libraries/m480/StdDriver/src/nu_rtc.c
Original file line number Diff line number Diff line change
Expand Up @@ -67,15 +67,15 @@ void RTC_Open(S_RTC_TIME_DATA_T *sPt)
{
RTC->INIT = RTC_INIT_KEY;

if(RTC->INIT != RTC_INIT_ACTIVE_Msk)
if (RTC->INIT != RTC_INIT_ACTIVE_Msk)
{
RTC->INIT = RTC_INIT_KEY;
while(RTC->INIT != RTC_INIT_ACTIVE_Msk)
while (RTC->INIT != RTC_INIT_ACTIVE_Msk)
{
}
}

if(sPt == 0)
if (sPt == 0)
{
}
else
Expand Down Expand Up @@ -110,14 +110,14 @@ void RTC_Close(void)
void RTC_32KCalibration(int32_t i32FrequencyX10000)
{
uint64_t u64Compensate;
int32_t i32RegInt,i32RegFra ;
int32_t i32RegInt, i32RegFra ;

if(!(SYS->CSERVER & 0x1))
if (!(SYS->CSERVER & 0x1))
{
u64Compensate = (uint64_t)(0x2710000000000);
u64Compensate = (uint64_t)(u64Compensate / (uint64_t)i32FrequencyX10000);

if(u64Compensate >= (uint64_t)0x400000)
if (u64Compensate >= (uint64_t)0x400000)
{
u64Compensate = (uint64_t)0x3FFFFF;
}
Expand All @@ -128,23 +128,23 @@ void RTC_32KCalibration(int32_t i32FrequencyX10000)
else
{
/* Compute Integer and Fraction for RTC register*/
i32RegInt = (i32FrequencyX10000/10000) - 32752;
i32RegFra = ((((i32FrequencyX10000%10000)) * 64) + 5000) / 10000;
i32RegInt = (i32FrequencyX10000 / 10000) - 32752;
i32RegFra = ((((i32FrequencyX10000 % 10000)) * 64) + 5000) / 10000;

if(i32RegFra >= 0x40)
if (i32RegFra >= 0x40)
{
i32RegFra = 0x0;
i32RegInt++;
}

/* Judge Integer part is reasonable */
if ( (i32RegInt < 0) | (i32RegInt > 31) )
if ((i32RegInt < 0) | (i32RegInt > 31))
{
return;
}

RTC_WaitAccessEnable();
RTC->FREQADJ = (uint32_t)((i32RegInt<<8) | i32RegFra);
RTC->FREQADJ = (uint32_t)((i32RegInt << 8) | i32RegFra);
}

}
Expand Down Expand Up @@ -204,13 +204,13 @@ void RTC_GetDateAndTime(S_RTC_TIME_DATA_T *sPt)
sPt->u32Day = u32Tmp + g_u32loDay;

/* Compute 12/24 hour */
if(sPt->u32TimeScale == RTC_CLOCK_12)
if (sPt->u32TimeScale == RTC_CLOCK_12)
{
u32Tmp = (g_u32hiHour * 10ul);
u32Tmp += g_u32loHour;
sPt->u32Hour = u32Tmp; /* AM: 1~12. PM: 21~32. */

if(sPt->u32Hour >= 21ul)
if (sPt->u32Hour >= 21ul)
{
sPt->u32AmPm = RTC_PM;
sPt->u32Hour -= 20ul;
Expand Down Expand Up @@ -301,13 +301,13 @@ void RTC_GetAlarmDateAndTime(S_RTC_TIME_DATA_T *sPt)
sPt->u32Day = u32Tmp + g_u32loDay;

/* Compute 12/24 hour */
if(sPt->u32TimeScale == RTC_CLOCK_12)
if (sPt->u32TimeScale == RTC_CLOCK_12)
{
u32Tmp = (g_u32hiHour * 10ul);
u32Tmp += g_u32loHour;
sPt->u32Hour = u32Tmp; /* AM: 1~12. PM: 21~32. */

if(sPt->u32Hour >= 21ul)
if (sPt->u32Hour >= 21ul)
{
sPt->u32AmPm = RTC_PM;
sPt->u32Hour -= 20ul;
Expand Down Expand Up @@ -366,7 +366,7 @@ void RTC_SetDateAndTime(S_RTC_TIME_DATA_T *sPt)
{
uint32_t u32RegCAL, u32RegTIME;

if(sPt == 0ul)
if (sPt == NULL)
{
}
else
Expand All @@ -375,14 +375,14 @@ void RTC_SetDateAndTime(S_RTC_TIME_DATA_T *sPt)
/* Set RTC 24/12 hour setting and Day of the Week */
/*-----------------------------------------------------------------------------------------------------*/
RTC_WaitAccessEnable();
if(sPt->u32TimeScale == RTC_CLOCK_12)
if (sPt->u32TimeScale == RTC_CLOCK_12)
{
RTC->CLKFMT &= ~RTC_CLKFMT_24HEN_Msk;

/*-------------------------------------------------------------------------------------------------*/
/* Important, range of 12-hour PM mode is 21 up to 32 */
/*-------------------------------------------------------------------------------------------------*/
if(sPt->u32AmPm == RTC_PM)
if (sPt->u32AmPm == RTC_PM)
{
sPt->u32Hour += 20ul;
}
Expand Down Expand Up @@ -447,7 +447,7 @@ void RTC_SetAlarmDateAndTime(S_RTC_TIME_DATA_T *sPt)
{
uint32_t u32RegCALM, u32RegTALM;

if(sPt == 0)
if (sPt == NULL)
{
}
else
Expand All @@ -456,14 +456,14 @@ void RTC_SetAlarmDateAndTime(S_RTC_TIME_DATA_T *sPt)
/* Set RTC 24/12 hour setting and Day of the Week */
/*-----------------------------------------------------------------------------------------------------*/
RTC_WaitAccessEnable();
if(sPt->u32TimeScale == RTC_CLOCK_12)
if (sPt->u32TimeScale == RTC_CLOCK_12)
{
RTC->CLKFMT &= ~RTC_CLKFMT_24HEN_Msk;

/*-------------------------------------------------------------------------------------------------*/
/* Important, range of 12-hour PM mode is 21 up to 32 */
/*-------------------------------------------------------------------------------------------------*/
if(sPt->u32AmPm == RTC_PM)
if (sPt->u32AmPm == RTC_PM)
{
sPt->u32Hour += 20ul;
}
Expand Down Expand Up @@ -549,7 +549,7 @@ void RTC_SetTime(uint32_t u32Hour, uint32_t u32Minute, uint32_t u32Second, uint3
uint32_t u32RegTIME;

/* Important, range of 12-hour PM mode is 21 up to 32 */
if((u32TimeMode == RTC_CLOCK_12) && (u32AmPm == RTC_PM))
if ((u32TimeMode == RTC_CLOCK_12) && (u32AmPm == RTC_PM))
{
u32Hour += 20ul;
}
Expand All @@ -565,7 +565,7 @@ void RTC_SetTime(uint32_t u32Hour, uint32_t u32Minute, uint32_t u32Second, uint3
/* Set RTC 24/12 hour setting and Day of the Week */
/*-----------------------------------------------------------------------------------------------------*/
RTC_WaitAccessEnable();
if(u32TimeMode == RTC_CLOCK_12)
if (u32TimeMode == RTC_CLOCK_12)
{
RTC->CLKFMT &= ~RTC_CLKFMT_24HEN_Msk;
}
Expand Down Expand Up @@ -624,7 +624,7 @@ void RTC_SetAlarmTime(uint32_t u32Hour, uint32_t u32Minute, uint32_t u32Second,
uint32_t u32RegTALM;

/* Important, range of 12-hour PM mode is 21 up to 32 */
if((u32TimeMode == RTC_CLOCK_12) && (u32AmPm == RTC_PM))
if ((u32TimeMode == RTC_CLOCK_12) && (u32AmPm == RTC_PM))
{
u32Hour += 20ul;
}
Expand All @@ -640,7 +640,7 @@ void RTC_SetAlarmTime(uint32_t u32Hour, uint32_t u32Minute, uint32_t u32Second,
/* Set RTC 24/12 hour setting and Day of the Week */
/*-----------------------------------------------------------------------------------------------------*/
RTC_WaitAccessEnable();
if(u32TimeMode == RTC_CLOCK_12)
if (u32TimeMode == RTC_CLOCK_12)
{
RTC->CLKFMT &= ~RTC_CLKFMT_24HEN_Msk;
}
Expand Down Expand Up @@ -861,15 +861,15 @@ void RTC_StaticTamperEnable(uint32_t u32TamperSelect, uint32_t u32DetecLevel, ui
RTC_WaitAccessEnable();
u32Reg = RTC->TAMPCTL;

u32TmpReg = ( RTC_TAMPCTL_TAMP0EN_Msk | (u32DetecLevel << RTC_TAMPCTL_TAMP0LV_Pos) |
(u32DebounceEn << RTC_TAMPCTL_TAMP0DBEN_Pos) );
u32TmpReg = (RTC_TAMPCTL_TAMP0EN_Msk | (u32DetecLevel << RTC_TAMPCTL_TAMP0LV_Pos) |
(u32DebounceEn << RTC_TAMPCTL_TAMP0DBEN_Pos));

for(i = 0ul; i < MAX_TAMPER_PIN_NUM; i++)
for (i = 0ul; i < MAX_TAMPER_PIN_NUM; i++)
{
if(u32TamperSelect & (0x1ul << i))
if (u32TamperSelect & (0x1ul << i))
{
u32Reg &= ~((RTC_TAMPCTL_TAMP0EN_Msk|RTC_TAMPCTL_TAMP0LV_Msk|RTC_TAMPCTL_TAMP0DBEN_Msk) << (i*4ul));
u32Reg |= (u32TmpReg << (i*4ul));
u32Reg &= ~((RTC_TAMPCTL_TAMP0EN_Msk | RTC_TAMPCTL_TAMP0LV_Msk | RTC_TAMPCTL_TAMP0DBEN_Msk) << (i * 4ul));
u32Reg |= (u32TmpReg << (i * 4ul));
}
}

Expand Down Expand Up @@ -904,11 +904,11 @@ void RTC_StaticTamperDisable(uint32_t u32TamperSelect)

u32TmpReg = (RTC_TAMPCTL_TAMP0EN_Msk);

for(i = 0ul; i < MAX_TAMPER_PIN_NUM; i++)
for (i = 0ul; i < MAX_TAMPER_PIN_NUM; i++)
{
if(u32TamperSelect & (0x1ul << i))
if (u32TamperSelect & (0x1ul << i))
{
u32Reg &= ~(u32TmpReg << (i*4ul));
u32Reg &= ~(u32TmpReg << (i * 4ul));
}
}

Expand Down Expand Up @@ -958,7 +958,7 @@ void RTC_DynamicTamperEnable(uint32_t u32PairSel, uint32_t u32DebounceEn, uint32
u32Reg &= ~(RTC_TAMPCTL_DYN1ISS_Msk | RTC_TAMPCTL_DYN2ISS_Msk);
u32Reg |= ((u32Pair1Source & 0x1ul) << RTC_TAMPCTL_DYN1ISS_Pos) | ((u32Pair2Source & 0x1ul) << RTC_TAMPCTL_DYN2ISS_Pos);

if(u32DebounceEn)
if (u32DebounceEn)
{
u32TmpReg = (RTC_TAMPCTL_TAMP0EN_Msk | RTC_TAMPCTL_TAMP1EN_Msk |
RTC_TAMPCTL_TAMP0DBEN_Msk | RTC_TAMPCTL_TAMP1DBEN_Msk | RTC_TAMPCTL_DYNPR0EN_Msk);
Expand All @@ -968,22 +968,22 @@ void RTC_DynamicTamperEnable(uint32_t u32PairSel, uint32_t u32DebounceEn, uint32
u32TmpReg = (RTC_TAMPCTL_TAMP0EN_Msk | RTC_TAMPCTL_TAMP1EN_Msk | RTC_TAMPCTL_DYNPR0EN_Msk);
}

for(i = 0ul; i < MAX_PAIR_NUM; i++)
for (i = 0ul; i < MAX_PAIR_NUM; i++)
{
if(u32PairSel & (0x1ul << i))
if (u32PairSel & (0x1ul << i))
{
u32Reg &= ~((RTC_TAMPCTL_TAMP0DBEN_Msk | RTC_TAMPCTL_TAMP1DBEN_Msk) << (i*8ul));
u32Reg |= (u32TmpReg << (i*8ul));
u32Reg &= ~((RTC_TAMPCTL_TAMP0DBEN_Msk | RTC_TAMPCTL_TAMP1DBEN_Msk) << (i * 8ul));
u32Reg |= (u32TmpReg << (i * 8ul));
}
}

if((u32Pair1Source) && (u32PairSel & RTC_PAIR1_SELECT))
if ((u32Pair1Source) && (u32PairSel & RTC_PAIR1_SELECT))
{
u32Reg &= ~RTC_TAMPCTL_TAMP2EN_Msk;
u32Reg |= u32Tamper2Debounce;
}

if((u32Pair2Source) && (u32PairSel & RTC_PAIR2_SELECT))
if ((u32Pair2Source) && (u32PairSel & RTC_PAIR2_SELECT))
{
u32Reg &= ~RTC_TAMPCTL_TAMP4EN_Msk;
u32Reg |= u32Tamper4Debounce;
Expand Down Expand Up @@ -1015,23 +1015,23 @@ void RTC_DynamicTamperDisable(uint32_t u32PairSel)
RTC_WaitAccessEnable();
u32Reg = RTC->TAMPCTL;

if((u32Reg & RTC_TAMPCTL_DYN1ISS_Msk) && (u32PairSel & RTC_PAIR1_SELECT))
if ((u32Reg & RTC_TAMPCTL_DYN1ISS_Msk) && (u32PairSel & RTC_PAIR1_SELECT))
{
u32Tamper2En = u32Reg & RTC_TAMPCTL_TAMP2EN_Msk;
}

if((u32Reg & RTC_TAMPCTL_DYN2ISS_Msk) && (u32PairSel & RTC_PAIR2_SELECT))
if ((u32Reg & RTC_TAMPCTL_DYN2ISS_Msk) && (u32PairSel & RTC_PAIR2_SELECT))
{
u32Tamper4En = u32Reg & RTC_TAMPCTL_TAMP4EN_Msk;
}

u32TmpReg = (RTC_TAMPCTL_TAMP0EN_Msk | RTC_TAMPCTL_TAMP1EN_Msk | RTC_TAMPCTL_DYNPR0EN_Msk);

for(i = 0ul; i < MAX_PAIR_NUM; i++)
for (i = 0ul; i < MAX_PAIR_NUM; i++)
{
if(u32PairSel & (0x1ul << i))
if (u32PairSel & (0x1ul << i))
{
u32Reg &= ~(u32TmpReg << ((i*8ul)));
u32Reg &= ~(u32TmpReg << ((i * 8ul)));
}
}

Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -239,9 +239,9 @@ typedef enum IRQn
/****** Platform Exceptions Numbers ***************************************************/
LVD_IRQn = 32, /*!< Low Voltage detection Interrupt */
A35PMU_IRQn = 33, /*!< A35 PMU Interrupt */
HSEM_IRQn = 34, /*!< Hardware Semaphore Interrupt */
HWSEM0_IRQn = 34, /*!< Hardware Semaphore Interrupt */
CKFAIL_IRQn = 35, /*!< Clock failed Interrupt */
WRHO_IRQn = 36, /*!< Wormhole Interrupt */
WHC0_IRQn = 36, /*!< Wormhole Interrupt */
RTC_IRQn = 37, /*!< Real Time Clock Interrupt */
TAMPER_IRQn = 38, /*!< Tamper detection Interrupt */
WDT0_IRQn = 39, /*!< Watchdog timer 0 Interrupt */
Expand All @@ -266,7 +266,7 @@ typedef enum IRQn
SSPCC_IRQn = 58, /*!< SSPCC Interrupt */
GFX_IRQn = 59, /*!< GFX GC520L Interrupt (Graphic Engine) */
VDE_IRQn = 60, /*!< Video Decoder (VC8000) Interrupt */
WRHO1_IRQn = 61, /*!< WRHO 1 Interrupt */
WHC1_IRQn = 61, /*!< WRHO 1 Interrupt */
SDH0_IRQn = 62, /*!< SDH 0 Interrupt */
SDH1_IRQn = 63, /*!< SDH 1 Interrupt */
HSUSBD_IRQn = 64, /*!< USB 2.0 High-Speed Device Interrupt */
Expand Down Expand Up @@ -468,6 +468,7 @@ typedef enum IRQn

#include "sdh_reg.h"
#include "ccap_reg.h"
#include "nfi_reg.h"

/** @addtogroup PERIPHERAL_MEM_MAP Peripheral Memory Base
Memory Mapped Structure for Peripherals
Expand Down Expand Up @@ -781,6 +782,7 @@ typedef enum IRQn
#define CCAP0 ((CCAP_T*) CCAP0_BASE)
#define CCAP1 ((CCAP_T*) CCAP1_BASE)

#define NFI ((NFI_T*) NAND_BASE)
/*@}*/ /* end of group ERIPHERAL_DECLARATION */

/** @addtogroup IO_ROUTINE I/O Routines
Expand Down
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