Zero register optimization for AVX-512-VBMI #14241
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- Take advantage of the fact that AVX instructions zero the upper 128 bits for a nice optimization when one input vector is zeroed
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I had an idea for an optimization and decided to write it before I forgot about it.
Take advantage of the fact that AVX instructions zero the upper 128 bits for a nice optimization when one input vector is zeroed, using the same 256 wide vpermb trick. Since bit 0x10 is selecting the second (zeroed) vector, with a 256 wide vpermb, the 0x10 bit conveniently selects the already zeroed bits.