Users/mkulikow/ck/data prefetch in mxgemm pipeline - #9752
Merged
JeniferC99 merged 2 commits intoJul 27, 2026
Conversation
❌ PR Check — Action Required
📖 Need help? See the Policy FAQ for details on every check and how to fix failures. |
|
🚫 Please fix the failed policies before requesting reviews. The following policy checks failed:
The |
AMD-mkulikow
force-pushed
the
users/mkulikow/ck/data_prefetch_in_mxgemm_pipeline
branch
from
July 23, 2026 12:06
6981d65 to
ed4ce98
Compare
AMD-mkulikow
force-pushed
the
users/mkulikow/ck/data_prefetch_in_mxgemm_pipeline
branch
from
July 23, 2026 14:52
ed4ce98 to
eb24e03
Compare
AMD-mkulikow
force-pushed
the
users/mkulikow/ck/data_prefetch_in_mxgemm_pipeline
branch
from
July 24, 2026 08:15
eb24e03 to
8fd7608
Compare
Add a standalone flatmm example (mx_flatmm_data_cache_prefetch) that runs MX GEMM through the compute TDM v1 pipeline (GemmPipelineAgBgCrCompTDMV1) with hardware data cache prefetch on gfx1250. Prefetch destination is selectable per operand (A/B) between L1, L2 or None via the DataCachePrefetchKind trait, exposed through -prefetch_a_l1 / -prefetch_b_l1 CLI flags, with an optional -compare mode against a no-prefetch run. Guarded behind gfx125 in the 18_flatmm CMakeLists. Also fix data cache prefetch being silently disabled in the scaled operator() of GemmPipelineAgBgCrCompTDMV1. The scaled path defaulted data_cache_prefetch_a/b to false and only set them under UseClusterLaunch, so with cluster launch off the runtime guards folded away every prefetch and no global_prefetch_b8 was emitted despite an L1/L2 policy. Default them to true (matching the non-scaled operator()); emission stays gated by the compile-time UseDataCachePrefetch policy check, so None still emits nothing.
AMD-mkulikow
force-pushed
the
users/mkulikow/ck/data_prefetch_in_mxgemm_pipeline
branch
from
July 27, 2026 13:26
8fd7608 to
1f13323
Compare
… handling for gfx1250 gfx1250 data-cache prefetch (prefetch_for_tdm / prefetch_for_flat) computed byte offsets and coverage using the wrong cacheline size and double-counted the packing factor for sub-byte packed types (e.g. pk_fp4), causing redundant/ mis-addressed prefetches. Changes in tile_window.hpp: - getCachelineSize(): L1 cacheline is 128B on gfx1250 (was 32B). - prefetch_for_tdm_covers_more_calls / prefetch_for_flat_covers_more_calls: compute bytes_per_x_step, cacheline_part_covered and x_len_bytes in physical bytes by dividing by Traits::PackedSize instead of multiplying. This lets the IsOverprefetched coverage check actually fire for packed types, removing the redundant per-iteration A/B prefetches. - prefetch_for_tdm / prefetch_for_flat issuers: x is already in packed-element units, so col_prefetch_stride converts cacheline bytes to packed elements with sizeof only (no extra /PackedSize), and the prefetch offset uses x directly (drop the x * PackedSize double-count). No-op for non-packed types (PackedSize == 1), consistent with the tdm_load_to_lds address convention. prefetch_op_util.hpp: match the 128B L1 cacheline size in the prefetch op test.
AMD-mkulikow
force-pushed
the
users/mkulikow/ck/data_prefetch_in_mxgemm_pipeline
branch
from
July 27, 2026 13:33
1f13323 to
187b646
Compare
JeniferC99
deleted the
users/mkulikow/ck/data_prefetch_in_mxgemm_pipeline
branch
July 27, 2026 18:51
assistant-librarian Bot
pushed a commit
to ROCm/composable_kernel
that referenced
this pull request
Jul 27, 2026
Users/mkulikow/ck/data prefetch in mxgemm pipeline JIRA ID : AICK-1670 ## Motivation Added example for data cache prefetch in mx gemm pipeline while also fixing some bugs in data cache prefetch pipeline ## Technical Details Add a standalone flatmm example (mx_flatmm_data_cache_prefetch) that runs MX GEMM through the compute TDM v1 pipeline (GemmPipelineAgBgCrCompTDMV1) with hardware data cache prefetch on gfx1250. Prefetch destination is selectable per operand (A/B) between L1, L2 or None via the DataCachePrefetchKind trait, exposed through -prefetch_a_l1 / -prefetch_b_l1 CLI flags, with an optional -compare mode against a no-prefetch run. Guarded behind gfx125 in the 18_flatmm CMakeLists. Also fix data cache prefetch being silently disabled in the scaled operator() of GemmPipelineAgBgCrCompTDMV1. The scaled path defaulted data_cache_prefetch_a/b to false and only set them under UseClusterLaunch, so with cluster launch off the runtime guards folded away every prefetch and no global_prefetch_b8 was emitted despite an L1/L2 policy. Default them to true (matching the non-scaled operator()); emission stays gated by the compile-time UseDataCachePrefetch policy check, so None still emits nothing. ## Test Plan Checked on simulators: test name: tile_example_mx_flatmm_mxgemm_data_cache_prefetch ## Test Result fp4 for 512x512x4096: no prefetch/L1 prefetch: 71,334 / 54,889 ( 23.1% increase ) ## Submission Checklist - [x] Look over the contributing guidelines at https://github.com/ROCm/ROCm/blob/develop/CONTRIBUTING.md#pull-requests.
shumway
pushed a commit
to ROCm/composable_kernel
that referenced
this pull request
Aug 18, 2026
Users/mkulikow/ck/data prefetch in mxgemm pipeline JIRA ID : AICK-1670 ## Motivation Added example for data cache prefetch in mx gemm pipeline while also fixing some bugs in data cache prefetch pipeline ## Technical Details Add a standalone flatmm example (mx_flatmm_data_cache_prefetch) that runs MX GEMM through the compute TDM v1 pipeline (GemmPipelineAgBgCrCompTDMV1) with hardware data cache prefetch on gfx1250. Prefetch destination is selectable per operand (A/B) between L1, L2 or None via the DataCachePrefetchKind trait, exposed through -prefetch_a_l1 / -prefetch_b_l1 CLI flags, with an optional -compare mode against a no-prefetch run. Guarded behind gfx125 in the 18_flatmm CMakeLists. Also fix data cache prefetch being silently disabled in the scaled operator() of GemmPipelineAgBgCrCompTDMV1. The scaled path defaulted data_cache_prefetch_a/b to false and only set them under UseClusterLaunch, so with cluster launch off the runtime guards folded away every prefetch and no global_prefetch_b8 was emitted despite an L1/L2 policy. Default them to true (matching the non-scaled operator()); emission stays gated by the compile-time UseDataCachePrefetch policy check, so None still emits nothing. ## Test Plan Checked on simulators: test name: tile_example_mx_flatmm_mxgemm_data_cache_prefetch ## Test Result fp4 for 512x512x4096: no prefetch/L1 prefetch: 71,334 / 54,889 ( 23.1% increase ) ## Submission Checklist - [x] Look over the contributing guidelines at https://github.com/ROCm/ROCm/blob/develop/CONTRIBUTING.md#pull-requests.
This file contains hidden or bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
Sign up for free
to join this conversation on GitHub.
Already have an account?
Sign in to comment
2 participants
Add this suggestion to a batch that can be applied as a single commit.This suggestion is invalid because no changes were made to the code.Suggestions cannot be applied while the pull request is closed.Suggestions cannot be applied while viewing a subset of changes.Only one suggestion per line can be applied in a batch.Add this suggestion to a batch that can be applied as a single commit.Applying suggestions on deleted lines is not supported.You must change the existing code in this line in order to create a valid suggestion.Outdated suggestions cannot be applied.This suggestion has been applied or marked resolved.Suggestions cannot be applied from pending reviews.Suggestions cannot be applied on multi-line comments.Suggestions cannot be applied while the pull request is queued to merge.Suggestion cannot be applied right now. Please check back later.
JIRA ID : AICK-1670
Motivation
Added example for data cache prefetch in mx gemm pipeline while also fixing some bugs in data cache prefetch pipeline
Technical Details
Add a standalone flatmm example (mx_flatmm_data_cache_prefetch) that runs
MX GEMM through the compute TDM v1 pipeline (GemmPipelineAgBgCrCompTDMV1)
with hardware data cache prefetch on gfx1250. Prefetch destination is
selectable per operand (A/B) between L1, L2 or None via the
DataCachePrefetchKind trait, exposed through -prefetch_a_l1 / -prefetch_b_l1
CLI flags, with an optional -compare mode against a no-prefetch run.
Guarded behind gfx125 in the 18_flatmm CMakeLists.
Also fix data cache prefetch being silently disabled in the scaled
operator() of GemmPipelineAgBgCrCompTDMV1. The scaled path defaulted
data_cache_prefetch_a/b to false and only set them under
UseClusterLaunch, so with cluster launch off the runtime guards folded
away every prefetch and no global_prefetch_b8 was emitted despite an
L1/L2 policy. Default them to true (matching the non-scaled operator());
emission stays gated by the compile-time UseDataCachePrefetch policy
check, so None still emits nothing.
Test Plan
Checked on simulators:
test name: tile_example_mx_flatmm_mxgemm_data_cache_prefetch
Test Result
fp4 for 512x512x4096:
no prefetch/L1 prefetch: 71,334 / 54,889 ( 23.1% increase )
Submission Checklist