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Adding DqDkDv d64 variants fp16 + bf16 batch - #7804

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aosewski merged 7 commits into
users/shumway/ck/exp-kpackfrom
users/bidlekm/p3-5-dqdkdv-d64-batch
Jun 2, 2026
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Adding DqDkDv d64 variants fp16 + bf16 batch#7804
aosewski merged 7 commits into
users/shumway/ck/exp-kpackfrom
users/bidlekm/p3-5-dqdkdv-d64-batch

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@bidlekm

@bidlekm bidlekm commented May 27, 2026

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Summary

Exposes new d64 batch-mode dqdkdv kernel variants in the rocm_ck FMHA BWD wrapper layer. The underlying CK Tile kernels already exist; this PR adds the wrapper wiring so they are reachable from host code: new .hip entrypoints, registry entries, CMake build inclusion, pack.py manifest entries, host-side compatibility test coverage, and the required dqdkdv device bridge update for the d64 tile configuration.

Workplan task: ROCm_CK FMHA BWD P3-5

What this PR contains

File Change
fmha_bwd_dqdkdv_bf16_d64_batch.hip Adds new .hip entrypoint
fmha_bwd_dqdkdv_fp16_d64_batch.hip Adds new .hip entrypoint
CMakeLists.txt Adds the new dqdkdv d64 batch variants to the build
pack.py Adds the new variants to the manifest
rocm_fmha_bwd_registry.hpp Adds registry entries for the new d64 batch variants
dqdkdv_dev.hpp Extends the dqdkdv device bridge to support the d64 tile configuration
test_fmha_bwd_compat.cpp Adds host-side compatibility test coverage for the new d64 batch variants

Test plan

  • ninja rocm_ck_tests
  • ctest -L rocm_ck --output-on-failure: 64/64 pass
  • ctest -L compile_fail --output-on-failure: 45/45 pass

@bidlekm bidlekm self-assigned this May 27, 2026
@bidlekm
bidlekm requested a review from a team as a code owner May 27, 2026 13:12
@bidlekm bidlekm linked an issue May 27, 2026 that may be closed by this pull request
@bidlekm
bidlekm requested a review from Copilot May 27, 2026 14:16

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Pull request overview

This PR exposes new d64 batch-mode dqdkdv FMHA BWD kernel variants (FP16 and BF16) through the rocm_ck wrapper layer, wiring existing CK Tile kernels so they can be discovered, built, packed, and selected from host code.

Changes:

  • Added new .hip entrypoints for fmha_bwd_dqdkdv_{fp16,bf16}_d64_batch.
  • Extended the dqdkdv device bridge to select the correct d64 tile configuration (while retaining d128 support).
  • Updated registry, pack manifest, CMake build lists, and compatibility/registry tests to include the new variants.

Reviewed changes

Copilot reviewed 7 out of 7 changed files in this pull request and generated no comments.

Show a summary per file
File Description
projects/composablekernel/experimental/rocm_ck/tests/test_fmha_bwd_compat.cpp Adds frozen-baseline + registry lookup coverage for the new d64 batch variants; updates unregistered-case and expected variant count.
projects/composablekernel/experimental/rocm_ck/include/rocm_ck/ops/fmha_bwd/dqdkdv_dev.hpp Wires d64 tile geometry via conditional BlockTile selection and updates guards/comments accordingly.
projects/composablekernel/experimental/rocm_ck/examples/06_rocm_ck_fmha_bwd/rocm_fmha_bwd_registry.hpp Registers the new FP16/BF16 d64 batch variants for host-side selection.
projects/composablekernel/experimental/rocm_ck/examples/06_rocm_ck_fmha_bwd/pack.py Adds the new variants to the kpack manifest so they’re packed into the archive.
projects/composablekernel/experimental/rocm_ck/examples/06_rocm_ck_fmha_bwd/fmha_bwd_dqdkdv_fp16_d64_batch.hip New device entrypoint that launches the FP16 d64 batch variant via runFmhaBwdDQDKDV.
projects/composablekernel/experimental/rocm_ck/examples/06_rocm_ck_fmha_bwd/fmha_bwd_dqdkdv_bf16_d64_batch.hip New device entrypoint that launches the BF16 d64 batch variant via runFmhaBwdDQDKDV.
projects/composablekernel/experimental/rocm_ck/examples/06_rocm_ck_fmha_bwd/CMakeLists.txt Includes the new dqdkdv d64 batch variants in the per-variant build list.

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@illsilin

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please resolve merge conflict.

bidlekm and others added 6 commits June 1, 2026 14:09
The host grid is sized as ceil(seqlen_k / K.block_n0) while the kernel
maps blockIdx.x to the K-tile offset via kN0 (BlockTile[1]). If a future
hdim row wires a different bn0 (e.g. the gfx9 d256 row uses bn0=64), the
two diverge silently: too few blocks leaves dK/dV tail rows unwritten,
too many wastes seqlen-guarded work.

Assert block_n0 == BlockTile kN0 so the mismatch is a compile error
rather than a wrong-grid launch. Also reflow the over-length
conditional_t BlockTile alias to satisfy clang-format-18.

Addresses review findings #4 and #6 on PR #7804.

Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
The tile-geometry and block_per_cu comments still claimed "d128 only"
after d64 was wired. Clarify that the wired d64 and d128 rows both use
bn0=128 (so the hardcoded block_n0 is correct for both, guarded by the
device static_assert) and that production would derive these per hdim.

Comment-only; no behavior change. Addresses review finding #7 on
PR #7804.

Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
Registry_DqDkDv_ReturnsNullForUnregistered probes d96 to assert
findVariant() returns null. If a d96 variant is ever registered, that
probe silently passes for the wrong reason. Add a loop over
ALL_DQDKDV_VARIANTS asserting no d96 dqdkdv entry exists, so the premise
fails loudly and forces a new probe instead.

Also fix the file-header NOTE: drop the dead dqdkdv_spec.hpp:200-204
line reference and explain that block_n0 is identical (128) for d64 and
d128, so hdim_q/hdim_v gate tile selection (verified by the device
static_assert). Collapse the four d64 test initializers per
clang-format-18.

Addresses review findings #5, #6, #9, #10 on PR #7804.

Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
The base branch (users/shumway/ck/exp-kpack) refactored the dqdkdv
bridge to a table-driven design: dqdkdv_dev.hpp now builds BlockTile
from a consteval kTile lookup, and dqdkdv_spec.hpp derives block_n0,
block_size, and block_per_cu from GFX9_FP16_DQDKDV_BASE_TILES (which
already includes the d64 row) instead of hardcoding them. It also added
d32/d96/d256 batch variants.

Conflict resolution:
- dqdkdv_dev.hpp, dqdkdv_spec.hpp: take base. Its table-driven approach
  supersedes this PR's std::conditional_t<kIsD64,...> and the earlier
  review fixes built on the old structure (block_n0 is now derived from
  the same table as BlockTile, so the hand-added block_n0==kN0 assert
  and the stale-comment edits are no longer needed).
- CMakeLists.txt, pack.py, rocm_fmha_bwd_registry.hpp: union -- keep
  base's d32/d96/d128/d256 entries and re-add this PR's d64 batch
  variants (the unique P3-5 deliverable; base wired the d64 tile but
  not the user-facing variant).
- test_fmha_bwd_compat.cpp: take base (already has d64 spec tests via
  the tile table), add Registry_DqDkDv_FindsFP16/BF16D64Batch, and bump
  the dqdkdv variant count 28 -> 30.

The d64 .hip kernels remain from this PR. Host compat layer verified:
registry resolves both d64 variants, count is 30, and d64 derives
block_n0=128 / block_size=256 / block_per_cu=1 from the base table.

Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
@aosewski
aosewski merged commit 5bcb8f8 into users/shumway/ck/exp-kpack Jun 2, 2026
5 of 9 checks passed
@aosewski
aosewski deleted the users/bidlekm/p3-5-dqdkdv-d64-batch branch June 2, 2026 14:00
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[P3-5] DqDkDv d64 variants fp16 + bf16 batch

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