merge main into amd-staging #530
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…ics (llvm#165431) Add support for the following new AArch64 Neon intrinsics: ``` float16x8_t vmmlaq_f16_mf8_fpm(float16x8_t, mfloat8x16_t, mfloat8x16_t, fpm_t); float32x4_t vmmlaq_f32_mf8_fpm(float32x4_t, mfloat8x16_t, mfloat8x16_t, fpm_t); ```
Transform sequences like: ``` s_cselect_b64 s[12:13], -1, 0 s_or_b32 s6, s12, s13 ``` where s6 is dead to: `s_cselect_b64 s[12:13], -1, 0` --------- Signed-off-by: John Lu <John.Lu@amd.com>
Map EVL type VP_LOAD/VP_STORE for fixed length vectors to PPC load/store with length.
With this intrinsic, and supporting SelectionDAG nodes, we can better make use of instructions such as AArch64's `FDOT`.
In C++17, static constexpr members are implicitly inline, so they no longer require an out-of-line definition. Identified with readability-redundant-declaration.
In C++17, static constexpr members are implicitly inline, so they no longer require an out-of-line definition. Identified with readability-redundant-declaration.
In C++17, static constexpr members are implicitly inline, so they no longer require an out-of-line definition. Identified with readability-redundant-declaration.
In C++17, static constexpr members are implicitly inline, so they no longer require an out-of-line definition. The comments for these variables are also present in: mlir/include/mlir/Dialect/Bufferization/IR/BufferizationBase.td Identified with readability-redundant-declaration.
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…er Box types (llvm#165954) Currently we handle BoxChars separately and a little differently to the other BoxType's, however realistically they can be handled the same and should be to simplify the pass as much as we can.
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dpalermo
approved these changes
Nov 8, 2025
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