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cpu/stm32: add STM32U3 peripheral driver support#22428

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itsadarshnair:stm32u385-peripherals
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cpu/stm32: add STM32U3 peripheral driver support#22428
itsadarshnair wants to merge 6 commits into
RIOT-OS:masterfrom
itsadarshnair:stm32u385-peripherals

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Contribution description

Follow-up to the STM32U3 / NUCLEO-U385RG-Q bring-up (#), stacked on
that PR
. It adds the remaining MCU peripherals on top of the bring-up base.

Peripherals added (drivers in cpu/stm32, board wiring in
boards/nucleo-u385rg-q):

  • SPI — SPI1 on PA7/PA6/PA5; includes a fix for last-frame RX truncation on U3
    (continuous mode + CSUSP). Verified on hardware via loopback test.
  • PWM — TIM2 (CH1 User LED / PA5, CH2 PB3, CH3 PB10, CH4 PB11).
  • RTC — register/EXTI mappings for U3; uses the on-board 32.768 kHz LSE.
  • flashpage — page size / write block / FLASH key for U3; VCORE voltage range 1
    is selected so program/erase does not raise PGSERR.
  • VBAT — internal VBAT channel, with the U3 scaling/reference fixed.
  • HWRNG — U3 family whitelisted/routed.
  • ADCadc_f3_h7.c renamed to adc_f3_h7_u3.c and extended with the U3 path;
    ADC1 on Arduino A0–A5 plus internal VREFINT.
  • I2C — I2C1 on PB8/PB9, APB1 routing and register fixups.
  • USB device — USB DRD FS support in usbdev_fs (D+/D− on PA12/PA11).

Warning

ADC, I2C, and USB are work-in-progress: they are configured and compile, but
still have known bugs and are not yet verified on hardware. They are included here
so the board configuration is complete and to allow collaborative debugging, but
should be treated as experimental until fixed and tested.

Testing procedure

Note

Depends on # — review/merge that first. Flashing uses
STM32CubeProgrammer (OpenOCD does not yet support the STM32U3); see the bring-up
PR / board doc.md for the exact command.

Compiled for the NUCLEO-U385RG-Q:

cd tests/periph/spi && make BOARD=nucleo-u385rg-q
cd tests/periph/pwm && make BOARD=nucleo-u385rg-q
cd tests/periph/rtc && make BOARD=nucleo-u385rg-q
cd tests/periph/flashpage && make BOARD=nucleo-u385rg-q
cd tests/periph/adc && make BOARD=nucleo-u385rg-q
cd tests/periph/i2c && make BOARD=nucleo-u385rg-q
cd examples/advanced/usbus_minimal && make BOARD=nucleo-u385rg-q

Per-peripheral status:

Peripheral Status Notes
SPI working SPI1; verified via loopback test
PWM working TIM2 channels
RTC working on-board LSE
flashpage working program/erase + verify (VCORE range 1)
VBAT working internal VBAT channel, scaling fixed
ADC buggy external channels A0–A5 not reading correctly; under investigation
I2C buggy configured/compiles; bus scan can hang; under inve
USB device buggy configured/compiles; not yet working; under investigation

How to confirm it's not in master: these peripherals are not provided by the board
on master (the board and stm32u3 family don't exist there); after this P
make BOARD=nucleo-u385rg-q builds the apps above. The "working" peripherals behave
as their tests expect; ADC/I2C/USB still need fixes (see below).

Issues/PRs references

Depends on #22427 (initial bring-up). Together these two PRs supersede
the original #22175.Do not merge until #22427 is merged

Declaration of AI-Tools / LLMs usage:

AI-Tools / LLMs that were used are:

  • Claude Code with Claude Opus 4.8 for code generation, with user review
  • Gemini for documentation generation, with user review

Adarsh Nair Mullachery added 6 commits June 29, 2026 00:18
Add the STM32U3 (Cortex-M33) family to the STM32 CPU support: CPU_FAM
detection and line/RAM/ROM info, CMSIS header selection, Kconfig family
and model definitions, and the cpu_stm32u3 feature.

Clock bring-up uses the MSI oscillator to reach high SYSCLK (no PLL
needed); FLASH wait states are connected to the ACR register. Core
register fixups (APB3, AHB1ENR1/2, FLASH key, CLOCK_LSI) are added so
the family compiles.
Wire up GPIO (incl. EXTI/SYSCFG for external interrupts) and the
UART/LPUART driver for STM32U3, including LPUART clock routing.
Add the Nucleo-U385RG-Q board with the minimum to boot: CPU/clock
selection, LED/button, timer, and the UART/LPUART serial console.
Additional peripherals are added in a follow-up.
OpenOCD does not yet support the STM32U3, so note the STM32CubeProgrammer
CLI workflow as the interim way to flash the board.
Add STM32U3 support to the shared STM32 peripheral drivers:

- ADC: rename adc_f3_h7.c -> adc_f3_h7_u3.c and add the U3 path
- SPI: continuous-mode fix for last-frame truncation
- I2C: APB1 routing and register fixups
- USB: DRD FS support in usbdev_fs
- HWRNG, VBAT, RTC: whitelist/route the U3 family
- flashpage: page size / write block / FLASH key for U3
Declare and configure the remaining peripherals on the board: ADC, I2C,
PWM, RTC, SPI, and USB device (pins, instances, and FEATURES_PROVIDED).
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Hey @itsadarshnair, thank you for your first contribution! We really appreciate it! If you haven't already, please take a look at our contributing guidelines before the review process starts. Also, due to how the GitHub review system works, please avoid force-pushing or squashing your commits unless asked to by a maintainer (or unless your commit is still in "draft commit" stage). Lastly, make sure to comply with our AI Policy when using AI. Your pull request will be reviewed as soon as possible.

@github-actions github-actions Bot added Platform: ARM Platform: This PR/issue effects ARM-based platforms Area: doc Area: Documentation Area: build system Area: Build system Area: boards Area: Board ports Area: cpu Area: CPU/MCU ports Area: Kconfig Area: Kconfig integration labels Jun 29, 2026
@crasbe crasbe added Type: enhancement The issue suggests enhanceable parts / The PR enhances parts of the codebase / documentation CI: ready for build If set, CI server will compile all applications for all available boards for the labeled PR labels Jun 29, 2026
@crasbe crasbe self-assigned this Jun 29, 2026
@crasbe crasbe added the State: waiting for other PR State: The PR requires another PR to be merged first label Jun 29, 2026
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riot-ci commented Jun 30, 2026

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Murdock results

✔️ PASSED

c8a1cad boards/nucleo-u385rg-q: enable peripherals

Success Failures Total Runtime
11124 0 11124 12m:16s

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Labels

Area: boards Area: Board ports Area: build system Area: Build system Area: cpu Area: CPU/MCU ports Area: doc Area: Documentation Area: Kconfig Area: Kconfig integration CI: ready for build If set, CI server will compile all applications for all available boards for the labeled PR Platform: ARM Platform: This PR/issue effects ARM-based platforms State: waiting for other PR State: The PR requires another PR to be merged first Type: enhancement The issue suggests enhanceable parts / The PR enhances parts of the codebase / documentation

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3 participants