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cpu/sam0_common: RTC: ensure RTC alarm alignment for SAM D2x #16078
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cpu/sam0_common: RTC: ensure RTC alarm alignment for SAM D2x #16078
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Due to the nature of the RTC, the alarm will only trigger at the *end* of the set alarm second. This introduces a 1s offset to the alarm time. Compensate for this by subtracting 1s from the alarm time.
nice catch... |
Sadly I do not have any of the missing families to test, but I'm pretty sure @dylad does :D |
But IIRC you have a nice STM32 collection - do those agree on when to generate the alarm? |
I'm running this PR on them ATM |
I think this inconsistencies are showing up elsewhere as well like the clearalarm test, on some boards:
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Hmm no this seems to be just jitter. |
The test is passing In most cases for the BOARD's I have, issues arise because of #15628 on a couple of boards, sometimes I get the following:
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I'll run the test on SAMLxx by the end of the week. |
Test results:
This looks good to me. |
I don't think this needs to fully retested. Please squash right away. I can retest with a my wemos-zero, which has a SAMD21 MCU. The code change doesn't effect other MCUs anyway. |
I extended But if we always want to guarantee that |
tested on the samr21-xpro
saml10
Can you fix the murdock errors (I think some insufficient memory issue for |
Contribution description
There is an inconsistency with the behavior of the RTC on the sam0 family.
The RTC alarm on SAM D1x/2x is triggered at the end of the alarm second, on SAM D5x/E5x it's triggered at the start of the set alarm second.
The later behavior is closer to what one would expect IMHO.
The Datasheet read
for all members, but I could not observe this behavior on
same54-xpro
, but only onsamd10-xmini
andsamr21-xpro
.I modified
tests/periph_rtc
to take the current RTC time into account when setting the alarm instead of just incrementing the alarm time by 2.This reveals the inconsistent behavior (interval between alarms is now 3s instead of 2s without the RTC patch).
Testing procedure
Run
tests/periph_rtc
on all supported familysIt would be interesting to know if other CPUs have this problem too, the RTC test has been pretty lax about the second alignment so far.
Issues/PRs references
discovered in #15949