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cpu/fe310: add spi peripheral driver #12957
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Original file line number | Diff line number | Diff line change |
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/* | ||
* Copyright (C) 2019 Tristan Bruns | ||
* 2019 Inria | ||
* | ||
* This file is subject to the terms and conditions of the GNU Lesser | ||
* General Public License v2.1. See the file LICENSE in the top level | ||
* directory for more details. | ||
*/ | ||
|
||
/** | ||
* @ingroup cpu_fe310 | ||
* @ingroup drivers_periph_spi | ||
* | ||
* @{ | ||
* | ||
* @file spi.c | ||
* @brief Low-level SPI driver implementation | ||
* | ||
* @author Tristan Bruns | ||
* @author Alexandre Abadie <alexandre.abadie@inria.fr> | ||
* | ||
* @} | ||
*/ | ||
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#include "cpu.h" | ||
#include "mutex.h" | ||
#include "assert.h" | ||
#include "periph/spi.h" | ||
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#include "vendor/spi.h" | ||
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#define ENABLE_DEBUG (0) | ||
#include "debug.h" | ||
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static const uint32_t _spi_clks[] = { | ||
100000, | ||
400000, | ||
1000000, | ||
5000000, | ||
10000000, | ||
}; | ||
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#define SPI_CLK_NUMOF ARRAY_SIZE(_spi_clks) | ||
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static uint32_t _spi_clks_config[SPI_CLK_NUMOF] = { 0 }; | ||
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/* DIV_UP is division which rounds up instead of down */ | ||
#define SPI_DIV_UP(a,b) (((a) + ((b) - 1)) / (b)) | ||
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/** | ||
* @brief Allocation device locks | ||
*/ | ||
static mutex_t lock; | ||
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void spi_init(spi_t dev) | ||
{ | ||
/* make sure given bus device is valid */ | ||
assert(dev < SPI_NUMOF); | ||
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/* initialize the buses lock */ | ||
mutex_init(&lock); | ||
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for (uint8_t i = 0; i < SPI_CLK_NUMOF; ++i) { | ||
_spi_clks_config[i] = SPI_DIV_UP(cpu_freq(), 2 * _spi_clks[i]) - 1; | ||
} | ||
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/* trigger pin initialization */ | ||
spi_init_pins(dev); | ||
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/* disable hardware chip select | ||
(hardware chip select only supports one-byte transfers...) */ | ||
_REG32(spi_config[dev].addr, SPI_REG_CSMODE) = SPI_CSMODE_OFF; | ||
} | ||
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void spi_init_pins(spi_t dev) | ||
{ | ||
assert(dev < SPI_NUMOF); | ||
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const gpio_t spi1_pins = | ||
(1 << spi_config[dev].mosi) | | ||
(1 << spi_config[dev].miso) | | ||
(1 << spi_config[dev].sclk); | ||
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/* Enable I/O Function 0 */ | ||
GPIO_REG(GPIO_IOF_EN) |= spi1_pins; | ||
GPIO_REG(GPIO_IOF_SEL) &= ~spi1_pins; | ||
} | ||
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int spi_init_cs(spi_t dev, spi_cs_t cs) | ||
{ | ||
(void)dev; | ||
assert(dev < SPI_NUMOF); | ||
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/* setting the CS high before configuring it as an | ||
output should be fine on FE310. */ | ||
Comment on lines
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There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. Can you explain this? There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. hmm, not really, this was already implemented this way in the original PR. Maybe @pyropeter can give some insight ? |
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gpio_set(cs); | ||
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if (gpio_init(cs, GPIO_OUT)) { | ||
return SPI_NOCS; | ||
} | ||
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return SPI_OK; | ||
} | ||
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int spi_acquire(spi_t dev, spi_cs_t cs, spi_mode_t mode, spi_clk_t clk) | ||
{ | ||
(void)cs; | ||
assert(dev < SPI_NUMOF); | ||
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mutex_lock(&lock); | ||
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_REG32(spi_config[dev].addr, SPI_REG_SCKDIV) = _spi_clks_config[clk]; | ||
_REG32(spi_config[dev].addr, SPI_REG_SCKMODE) = mode; | ||
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return SPI_OK; | ||
} | ||
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void spi_release(spi_t dev) | ||
{ | ||
(void)dev; | ||
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mutex_unlock(&lock); | ||
} | ||
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void spi_transfer_bytes(spi_t dev, spi_cs_t cs, bool cont, | ||
const void *out_, void *in_, size_t len) | ||
{ | ||
assert(dev < SPI_NUMOF); | ||
assert((out_ || in_) && len > 0); | ||
assert(_REG32(spi_config[dev].addr, SPI_REG_RXFIFO) & SPI_RXFIFO_EMPTY); | ||
assert(!(_REG32(spi_config[dev].addr, SPI_REG_TXFIFO) & SPI_TXFIFO_FULL)); | ||
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const uint8_t *out = out_; | ||
uint8_t *in = in_; | ||
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if (cs != SPI_CS_UNDEF) { | ||
gpio_clear(cs); | ||
} | ||
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for (size_t i = 0; i < len; i++) { | ||
_REG32(spi_config[dev].addr, SPI_REG_TXFIFO) = out ? out[i] : 0; | ||
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uint32_t rxdata; | ||
do { | ||
rxdata = _REG32(spi_config[dev].addr, SPI_REG_RXFIFO); | ||
} while (rxdata & SPI_RXFIFO_EMPTY); | ||
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if (in) { | ||
in[i] = (uint8_t)rxdata; | ||
} | ||
} | ||
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if (cs != SPI_CS_UNDEF && !cont) { | ||
gpio_set(cs); | ||
} | ||
} |
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Seems like they could share the configuration file no?
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Yes and I'm planning to merge them in a common folder once all the new features are in: all other board peripheral configurations could also be shared in fact.
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So you don't want to address here?
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But ina follow up?
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Yes, otherwise, I'll have to rework all the other ones (i2c, pwm).