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cpu/stm32f7/4/2: add flashpage and flashpage_raw #11681
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Looks good at first sight. This is a nice work, very useful.
I have a comment regarding flashpage_init
, because I think it could be called from the cpu_init of the stm32.
The new code in flashpage.c should be uncrustified.
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Please uncrustify ;)
cpu/stm32_common/periph/flashpage.c
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#if defined(CPU_FAM_STM32F2) || defined(CPU_FAM_STM32F4) | ||
static inline int flashbank_sector(void *addr) { | ||
uint8_t sn = (uint8_t)(((uint32_t)addr - CPU_FLASH_BASE) / FLASHSECTOR_SIZE_MIN); | ||
if(sn > 3 && sn < 8) { |
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This looks like magic number. Can you add a comment and a reference ? Maybe there's a macro available from the CMSIS ?
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There is not Macro available in CMSIS, tell me if the comment is enough or if I should define Macros for this :)
cpu/stm32_common/periph/flashpage.c
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} | ||
#endif | ||
|
||
#if !(defined(CPU_FAM_STM32F2) || defined(CPU_FAM_STM32F4)) |
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#if !(defined(CPU_FAM_STM32F2) || defined(CPU_FAM_STM32F4)) | |
#if defined(CPU_FAM_STM32F0) || defined(CPU_FAM_STM32F1) \ | |
defined(CPU_FAM_STM32L0) || defined(CPU_FAM_STM32L1) \ | |
defined(CPU_FAM_STM32L4) |
Better be explicit
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Should this be done for the other cases not related to this PR?
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I would say yes but not in this PR.
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@aabadie I rebased and added support for STM32F7 |
-stm32f4 doesn't have pages but sectors, flashpage is used as a wrapper around sectors
-stm32f2 doesn't have pages but sectors, flashpage is used as a wrapper around sectors
-stm32f7 doesn't have pages but sectors, flashpage is used as as wrapper around sectors
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This issue has been automatically marked as stale because it has not had recent activity. It will be closed if no further activity occurs. If you want me to ignore this issue, please mark it with the "State: don't stale" label. Thank you for your contributions. |
Contribution description
This PR adds
flashpage
andflashpage_raw
for stm32f2/4/7stm32f2 and stm32f4. Theybothuse sectors as the way of dividing flash, instead of the usual page. These sector do not have the same size, and they can vary according to the specific CPU.This PR implements
flashpage
andflashpage_raw
as a wrapper over sectors. To still keep the page notion, an arbitrarypage
of length 1kB has been defined. When an erase is requested the sector where thispage
is located is only erased if thepage
was in not in a erase state anymore, i.e. '0xFF'.NOTE1: this "wrapper" concept is only for erasing, when it comes to writing it's pretty much the same than for other STM32.
NOTE2: there is an api change since aflashpage_init()
is introduced. Not sure if that is the best option.NOTE3: I tried to make it work forstm32f7
but I have problems with unexpected latency when performing flash operations, so delaying it out; but the general approach works as well forstm32f7
.Testing procedure
Tested on
nucleo-f207zg
,nucleo-f446re
,nucleo-f767zi
&stm32f429i-disc1
. On these or otherstm32f2
andstm32f4
run:make clean -C tests/periph_flashpage/ BOARD=nucleo-f207zg flash test
everything should pass.
Issues/PRs references