fixup! boards/hifive1*: rework clock configuration

RIOT-OS · Dec 20, 2019 · f9463e8 · f9463e8
1 parent 0766963
commit f9463e8
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Showing 2 changed files with 6 additions and 6 deletions.
diff --git a/boards/hifive1/include/periph_conf.h b/boards/hifive1/include/periph_conf.h
@@ -44,13 +44,13 @@ extern "C" {
 
 #if USE_CLOCK_HFXOSC_PLL
 #define CLOCK_PLL_R                 (1)             /* Divide input clock by 2, mandatory with HFXOSC */
-#define CLOCK_PLL_F                 (47)            /* Multiply REFR by 96, e.g 2 * (47 + 1) */
-#define CLOCK_PLL_Q                 (2)             /* Divide VCO by 4, e.g 2^2 */
+#define CLOCK_PLL_F                 (39)            /* Multiply REFR by 80, e.g 2 * (39 + 1) */
+#define CLOCK_PLL_Q                 (1)             /* Divide VCO by 2, e.g 2^1 */
 #define CLOCK_PLL_INPUT_CLOCK       (16000000UL)
 #define CLOCK_PLL_REFR              (CLOCK_PLL_INPUT_CLOCK / (CLOCK_PLL_R + 1))
 #define CLOCK_PLL_VCO               (CLOCK_PLL_REFR * (2 * (CLOCK_PLL_F + 1)))
 #define CLOCK_PLL_OUT               (CLOCK_PLL_VCO / (1 << CLOCK_PLL_Q))
-#define CLOCK_CORECLOCK             (CLOCK_PLL_OUT) /* 192000000Hz with the values used above */
+#define CLOCK_CORECLOCK             (CLOCK_PLL_OUT) /* 320000000Hz with the values used above */
 
 /* Check PLL settings */
 #if CLOCK_PLL_REFR != 8000000

diff --git a/boards/hifive1b/include/periph_conf.h b/boards/hifive1b/include/periph_conf.h
@@ -45,13 +45,13 @@ extern "C" {
 
 #if USE_CLOCK_HFXOSC_PLL
 #define CLOCK_PLL_R                 (1)             /* Divide input clock by 2, mandatory with HFXOSC */
-#define CLOCK_PLL_F                 (47)            /* Multiply REFR by 96, e.g 2 * (47 + 1) */
-#define CLOCK_PLL_Q                 (2)             /* Divide VCO by 4, e.g 2^2 */
+#define CLOCK_PLL_F                 (39)            /* Multiply REFR by 80, e.g 2 * (39 + 1) */
+#define CLOCK_PLL_Q                 (1)             /* Divide VCO by 2, e.g 2^1 */
 #define CLOCK_PLL_INPUT_CLOCK       (16000000UL)
 #define CLOCK_PLL_REFR              (CLOCK_PLL_INPUT_CLOCK / (CLOCK_PLL_R + 1))
 #define CLOCK_PLL_VCO               (CLOCK_PLL_REFR * (2 * (CLOCK_PLL_F + 1)))
 #define CLOCK_PLL_OUT               (CLOCK_PLL_VCO / (1 << CLOCK_PLL_Q))
-#define CLOCK_CORECLOCK             (CLOCK_PLL_OUT) /* 192000000Hz with the values used above */
+#define CLOCK_CORECLOCK             (CLOCK_PLL_OUT) /* 320000000Hz with the values used above */
 
 /* Check PLL settings */
 #if CLOCK_PLL_REFR != 8000000